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<chadmed>
s2idle is borked on tas2764. the same four codecs every single time fail on regcache_sync()
<chadmed>
only the left tweeter and left woofer 1 make it through, the rest fail consistently
<jannau>
sigh, backlight brightness nits to dac mapping looks logarithmic but my fitted logarithm has an oscillating error in both directions
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<chadmed_>
it looks like the chips just disappear off the bus. the regcache sync fails with -ENXIO, and tas2764->sdz_gpio doesnt exist upon resume...
<chadmed_>
resetting them before trying to restore the registers doesnt help
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<jannau>
povik: have you done any fixups for "m1n1.adt: Parse 'segment-ranges' of coprocessor nodes"? it seems to break HV boot due to what appears an adt parse problem for pmgr
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<povik>
jannau: yes. the sio PR should have a newer version
<povik>
chadmed_: that's a known issue due to not properly handling the reset gpio line being shared between codecs
<povik>
so the first codec in probe wins in obtaining the gpio reference, others on the same line fail (but that's ok, since the gpio is optional)
<povik>
that works out during boot, since the first codec to probe pulls down the reset line for all
<povik>
but it breaks down during the suspend/resume cycle
<chadmed_>
so i take it that means pulling SDZ low will never work on suspend for us?
<povik>
there either needs to be a bit of logic that pulls SDZ low after all codecs agree on it (like is done elsewhere in kernel in dealing with shared resets)
<povik>
or we shouldn't pull it down at all
<povik>
the second option could be short term workaround
<kettenis>
or the resume process should be done in two stages
<kettenis>
first stage restores power; second stage restores the registers
<povik>
right. will kernel let us easily do it though?
<povik>
meaning general kernel PM code
<povik>
ah it's ASoC calling tas2764_codec_resume
<chadmed_>
aiui asoc spawns a tas2764 driver for each codec, so option 1 (the good option) would be quite hard
<chadmed_>
but sw shutdown quiescent current is 10x hw shutdown on two voltage rails so we really should get it working properly
<povik>
of course every codec is a separate device in kernel model
<povik>
the issue is doing it nicely. reset subsystem does this for shared resets
<povik>
but this is a gpio without the reset subsystem involved
<povik>
there's been proposals on the list to create a reset controller representation out of such gpios
<povik>
that would be one solution
<povik>
kettenis: i don't see how to convince ASoC of the two stages unfortunately
<chadmed_>
we have the benefit of not officially supporting speakers yet (and probably for a while given we havent even started working on userspace safety) so theres time to work it out
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<chadmed_>
do we know if macos puts them into hw shutdown?
<povik>
no idea
<povik>
shouldn't matter :p
<chadmed_>
another 1UP over macos perhaps :D
<povik>
we could split it into resume of codec as kernel device and codec as sound card component
<povik>
that could be the two stages to go with in the kettenis' approach
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<povik>
the issue is that SDZ is currently raised in probe of codec as a sound card component, but probably no issue in changing it for consistence
<chadmed_>
so have like a tas2764_hw_{suspend,resume} that deals with the chip and then use the asoc suspend/resume just to save and restore the regs?
<povik>
yes. it's ugly but it will work
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<chadmed_>
povik: works a treat
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<joske>
chadmed: povik: looking forward to that fix :-)
<joske>
right now not using s2idle because then I lose the right channel ;-)
<joske>
so rebooting every time
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<eiln>
realistically what processes could leverage the ane
<eiln>
don't know what i should be focusing on rn
<eiln>
low precision (fp16) basic number crunching
<eiln>
best for chaining i.e. doing the last calculation with a different input again
<povik>
you can write a convolver so that we delegate all speaker DSP to it :p
<povik>
though at fp16 some audiophiles may complain about the quantization noise
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<eiln>
that's really fitting. looking into it rn
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<povik>
i wasn't being exactly serious
<povik>
but if you feel like it's a good demonstration, go ahead!
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<sven>
you can also coerce/train most ML models with 16bit precision and still get decent performance fwiw
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<sven>
duh, I think I just realized how to fix that dwc3 race: just create a local copy of dr_desired_role inside the spinlock at the beginning of __dwc3_set_mode
<sven>
ofc I’m nowhere near my M1s to test that :D
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<povik>
not sure if this should be fixed but i seem to 've hit an infinite loop in apple_dart_setup_resv_locked reserving a region (in DT) which is not a multiple of iommu granule in size
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<jannau>
don't do that, dart can only handle whole pages for now. how does macos deal with that? does it map with sub-page protection?
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<jannau>
it of course shouldn't hit an infinite loop but it certainly wasn't designed for this
<povik>
this is some auxiliary firmware data which can be freely placed (in iova space too)
<povik>
macos allocated a full page for each piece of it
<povik>
which i do too (with some optimization) but i left the unaligned sizes in DT
<jannau>
how are those annotated in the ADT? is that aop segment __ETEXT?
<povik>
no, the data is embedded in sio properties such as map-range=, dmashim=, and device-type=
<povik>
rather than trying to figure out an fdt schema for these to some degree opaque pieces of data i figured we could have m1n1 prepare the final structures sio wants a pointer to
<povik>
and reserving those and considering it auxiliary firmware :p
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<ChaosPrincess>
im trying to boot up the touchbar via m1n1, and the firmware upload seems to be working, but once it is done, trying to read reports does not work, and it seems to still speak the firmware upload protocol. Anyone have ideas as to what part of the initialization i might be missing? the spi data stream is the same as from macos.
<ChaosPrincess>
well, the digitizer part, it is connected to spi0
<povik>
i mean what machine
<povik>
spi.CTRL.val = 0xd
<povik>
that asserts chip select among other things, right?
<ChaosPrincess>
m1 mbp, j293
<ChaosPrincess>
that spi naturally comes out of reset with cs auto-enable on
<ChaosPrincess>
and it does send and receive correct data during firmware upload phase
<povik>
yes, but the device might be sensitive on chip select transitions
<povik>
you might need to do them right
<ChaosPrincess>
oh
<povik>
they can delimit a transaction and so
<povik>
just an idea...
<povik>
you should really do the hex<->binary conversion before and after-the-fact
<povik>
not interspersed with I/O code, that makes it hard to read
<ChaosPrincess>
gp.PIN[0x8b].val = 0x76a03 # - this line is enabling something that looks like an and gate on chip select, macos pulls it on an off with every packet
<ChaosPrincess>
you think that might be important?
<povik>
definitely might
<ChaosPrincess>
ty, ill try handling that one 'correctly' and seeing what will happen
<ChaosPrincess>
povik: did you know that you are amazing? cause if you didnt - you should know that you are.
<povik>
haha
<povik>
did it work?
<ChaosPrincess>
aye
<povik>
nice
<ChaosPrincess>
now to parse yet-another-apple's-hid-wrapper
<jannau>
sven: copying dwc->dr_desired_role under dwc->lock and using the stack copy inside __dwc3_set_mode prevents the race. feel free to add my Tested-by:
<sven>
I haven’t even written that patch yet :D
<sven>
feel free to submit your solution instead ;)
<sven>
ill otherwise do it tomorrow once I’m back home
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<jannau>
not really my solution I'll just did a little bit of typing like a monkey