ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | Non-development talk: #asahi | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<bluetail5> can you ask for an update?
<sven> jannau: huh, so if I connect my usb4 hub to my half-broken caldigit dock to my working caldigit dock I think I can very rarely reproduce that "entire BAR reads as -1" issue on the xhci controller in the second dock
<sven> maybe in like 1 out of 10-15 connections
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<jannau> sven: it's 100% with the samsung nvme both connected directly and through the dock.
<jannau> reproducible with the samsung 970 evo (sans Plus, afaik just different nand) from my thinkpad
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<sven> i have some local code that applies the tunables from linux in the correct sequence now but i'm not sure that'll help
<sven> otherwise I think tracing what macos does to the pcie MMIO and the config space and comparing to linux might uncover another magic bit
<sven> oh, or maybe we need some of those hidden tunables lina found for the gpu for atc and apciec as well
<bluetail5> sven CalDigit... ? I had the tb4 model and under macOS, I had this dock, trying to run 4 ssds in raid 0 (stripeset). And when I then benchmarked the drive, I got an immediate kernel panic and the system rebooted. Not to mention - that unit was running super hot.
<sven> i have the tb3 variant and that one works quite well on both macos and linux now
<sven> and i bet my half-broken one just has some cold solder joints on the connection between the two pcbs it seems to have
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<jannau> sven: "Timing buffered disk reads: 8824 MB in 3.00 seconds = 2941.07 MB/sec" with a Titan Ridge based nvme enclosure with a PCIev3 x4 link
<sven> \o/
<sven> should be more than 20gbps which requires lane bonding :)
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<jannau> 23.5gbps netto. samsung nvme doesn't work with titan ridge either. so running out of easy tests
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<sven> that issue still confuses me
<sven> from what I can tell my port init is very similar to what xnu does
<sven> I’ll push what i currently have with the tunables but I doubt that makes a difference
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<jannau> I'm still confused by the serror in the HV when reading the BAR, the nvme should be powered
<sven> yeah, that’s also very strange
<sven> I’ve never had a serror reading in that area as long as pcie is powered up
<sven> maybe do what pci_enable_dev does manually?
<sven> I think that one just flips a few bits in one config register
<jannau> with the device enabled I read all 0xffffffff in the HV
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<sven> ok, so that means that BAR is inactive for sone reason
<sven> but no idea how to debug this :-(
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<jannau> does someone know if `dd bs=8M if=/dev/rdiskN of=/dev/null` is a valid sequential read spped test on macos?
<jannau> the thunderbolt nvmes are considerably slower on macos. more than I would attribute to macos is bad compared to linux
<jannau> with the x4 nvme it's 2.8 GB/s vs. 1.9 GB/s
<jannau> with the x2 enclosure it is 1.5 vs. 1.2 GB/s
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<maz> jannau: the cost of userspace drivers?
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<Glanzmann> jannau: I tested on macos m1 air and compared to a amd64 with a kingston usb stick and get the same numbers, so yes your speedtest is valid: https://pbot.rmdir.de/dGb3Mf4-BvsrQ2IA7gM5xw
<sven> I’m not gonna complain that nvme via thunderbolt is much faster on Linux for some reason :D
<Glanzmann> c
<sven> wouldn’t surprise if the nvme driver is just much more optimized on Linux fwiw
<sven> hmm.. I wonder if we can easily hack lspci to read from a file when it wants to read the config space
<sven> might be interesting to see if anything suspicious shows up when running xnu
<sven> -F <file>Read PCI configuration dump from a given file
<sven> :D
<sven> jannau: ^-- can you try to dump the pci config space when running xnu and with that nvme connected and then parse it using lspci?
<sven> hrm... actually.. looks like it doesn't just take a raw dump :/
<jannau> it seems to parse lspci -x, shouldn't be hard to replicate
<jannau> not sure how it works with the extended PCIe config space, dumped via lspci -xxxx
<sven> btw. the issue with that xhci controller not working was just linux bus resource allocation here (pci 0000:30:00.0: BAR 0: failed to assign [mem size 0x00008000 64bit]) and not the issue that you see with that nvme device
<sven> also, lspci -xxxx seems to somehow trigger the pcie hotplug interrupt on this usb4 hub 🙃
<maz> man, TB is soooo much fun! :D
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<sven> all those obscure bugs of undocumented pcie, thunderbolt, usb and phy hardware combined!
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<jannau> BAR is readable in the HV with macos booted, mem address is identical
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<sven> can you dump the port MMIO Region and compare it?
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<sven> maybe there’s just another magic bit like the one that enables prefetchable memory somewhere
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<jannau> doesn't look like there's a significant difference if we ignore the first 36 bytes: tbt_samsung_970_evo_port0_dump.txt
<jannau> a little surprised that APPCLK_CGDIS is set in the macos dump
<jannau> let me format/mount the ssd
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<sven> did you mean the upload that txt file? :D
<sven> iirc the usb4 pcie also keeps the refclk off
<jannau> I did, but pasted the filename instad of the link: https://www.jannau.net/asahi/tbt_samsung_970_evo_port0_dump.txt
<sven> probabky because there's that protocol adapter instead of the phy
<sven> hm. if it’s nothing in that port MMIO space and also nothing in the config space there’s still that NHI thing left :/
<sven> I guess I’ll actually have to write a proper tracer for it after all
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