#asahi-dev on 2025-04-03 — irc logs at oftc.irclog.whitequark.org

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15:32 <sven> mischa85: so it looks like that XNU on M4 expects to be running in EL2 under what Apple calls SPTM in GL2, see e.g. https://github.com/apple-oss-distributions/xnu/blob/main/osfmk/arm64/sptm/start_sptm.s#L34

15:32 <sven> what i think happens is that they disabled their custom ISA extensions when using a raw boot object

15:33 <sven> (i.e. we're running under EL2 with GL2,etc. completely disabled)

15:33 <sven> when configuring a macho object they'll start this SPTM thing in GL2 and then drop to EL2 and only then give control to the macho

15:33 <sven> if that's true it's going to make hv bringup very very annoying

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16:33 <nickchan> sven: in that case might actually need to abuse bugs to gain GL2 control... (though probably not *too* hard with ctrr and such disabled)

16:34 <chaos_princess> but then they patch them and we are still in the same boat for m5

16:37 <nickchan> chaos_princess: right every firmware version that would want to be supported for the hypervisor would need a bug, but then again having a fully hostile xnu is different from typical sptm bypass scenario where the attack will not even have xnu code exec so there may not be much incentive to patch them

16:37 <nickchan> but I hope that bugs are not needed

16:38 <chaos_princess> nah, they will patch them if we use them in m1n1

16:39 <nickchan> i already noticed some weirdness on m1 where the stock kernel would refuse to work under the custom boot object unless ctrr is disabled as well

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16:40 <jannau_> I guess I need newer GPUs

16:40 <jannau_> OpenGL ES profile renderer: AMD RV710 (DRM 2.50.0 / 6.14.0-asahi+, LLVM 19.1.7)

16:41 <nickchan> alternative is NV GL1

16:41 <jannau_> renders at least glxgears

16:41 <j`ey> PCIe GPU?

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16:41 <chaos_princess> oh

16:41 <chaos_princess> i think i know where this is going :P

16:41 <nickchan> NV GL1 (so it appears to be GL2) should not need bugs but that would be immense complexity I would imagine

16:42 <nickchan> need to be under VHE even macOS NV only does nVHE i think

16:42 <chaos_princess> what

16:43 <chaos_princess> i thought macos is vhe only

16:43 <chaos_princess> s/macos/m-chips/

16:43 <jannau_> yes, thank's to maz pcie changes

16:43 <jannau_> https://paste.debian.net/1367284/

16:43 <nickchan> chaos_princess: macOS emulates nVHE EL2 to guests with virtualization extensions

16:44 <nickchan> and you are correct that the underlying chip is VHE only those do not conflict

16:44 <chaos_princess> but, like, why

16:44 <j`ey> jannau_: I thought he was just upstreaming stuff from the tree

16:44 <chaos_princess> didn't everyone agree that nvhe was a bad idea and was deprecated

16:45 <nickchan> well only apple knows and this also makes them not able to do NV on M2

16:46 <chaos_princess> jannau_: what machine is it

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16:49 <jannau_> j`ey: not the current ones but https://lore.kernel.org/all/20241204150145.800408-3-maz@kernel.org/

16:49 <jannau_> chaos_princess: j180d

16:50 <chaos_princess> makes sense

16:50 <chaos_princess> whose?

16:51 <sven> sounds like hv on m4+ is gonna be painful either way *sigh*

16:52 <sven> the problem with abusing bugs is that they’ll probably still be fixed unless we keep them secret and I really don’t want to play that game again

16:55 <nickchan> iboot is not encrypted for so it is at least possible to *check* what is happening at least but that's firmly #asahi-re stuff

16:55 <sven> ohhh true

16:55 <nickchan> right they stopeed doing so in macOS 15 beta 4

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16:55 <sven> yeah, totally forgot about that

16:57 <sven> would be surprised if there was a way to run code in GL2 though

16:57 <sven> and even if there was we’d still need to see if we could stuff SPTM into GL1 and have everything still work as expected

16:58 <nickchan> sven: vresearch1 has a sptm in GL1

16:58 <nickchan> But I think sptm is very hw-specific

16:58 <nickchan> (vresearch1 is the PCC Research Guest thing)

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20:54 <sven> t8112 (M2) seems to have SPTM support as well in the latest firmware

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