ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | Non-development talk: #asahi | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<nickchan> also
<nickchan> does ACTLR TSO work for raw boot objects at least?
<chadmed> since its part of the arm spec i dont see why theyd gate that
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<nickchan> that and HACR traps
<nickchan> we use those in Linux
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<nickchan> and the HACR one is *not* compliant at least the PMUv3 part
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<chadmed> hopefully they left it as-is since those blas jokers didnt bring it up
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<sven> another thing that’s going to be annoying: DART etc is inside SPTM so we won’t be able to trace that
<nickchan> sven: cpu power management is probably inside sptm too
<nickchan> sigh so it's either not being able to trace some things or playing cat and mouse
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<nickchan> and the second option means keeping some things secret which is not very open source (though it should be possible to keep the shipped binaries fully open source as long as apple did not mess with hacr or actlr tso)
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<sven> there’s also the issue that booting on >15.1 seems to fail. maybe they accidentally broke raw boot objects and didn’t notice 🙃
<sven> but anyway, I’m not going to play cat and mouse. I’ve done that ages ago on consoles and don’t want to ever do that again. it’s just no fun
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<nickchan> think some other people may do it however
<nickchan> we will see
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<sven> as long as they’re gonna reverse all the new hardware and write drivers then :D
<sven> though I guess it’s just iommus and power stuff that’s hidden in SPTM and that binary isn’t very large
<sven> for the rest patching our tracers into xnu might just work
<nickchan> sven: xnu patching, where should it go? (python or in m1n1)
<nickchan> and the thing with any kind of patcher is that it will neccessary contain xnu instructions either in code or in comments
<nickchan> which would be directly from binary RE given the situations
<nickchan> not looking forwards to the copyright implications
<sven> it’s going to be painful, yes
<sven> haven’t thought about it in details but probably hijack exception vectors and maybe proxy calls to SPTM to mess with page tables
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<chadmed> what actually made them do this? was it literally those guys being like "we should implement AMX in linux"
<sven> maybe that. maybe arm lawyer being annoyed just because they were bored. maybe both. :/
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<nickchan> chadmed: who is "those guys"
<chadmed> aaaages ago some folks were asking around about adding AMX support to arm64 linux. we always maintained that we would never _ever_ support anything even remotely like that but i think upstream caught wind of it
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<nickchan> i think there's also a thing where some performance counters have some edge case regarding amx
<nickchan> ah, *that* got posted onto the mailing list
<chadmed> then of course there was the whole apple-specific TSO discussion that kinda went nowhere which probably didnt help in that regard especially since FEAT_LRCPC was already a thing
<chadmed> yeah which is why i think arm probably had some words to apple and they picked the nuclear option. which is just kind of really dickish of them
<nickchan> and after looking into xnu sources it seems that a12 and possibly a13 have TSO too, but not ACTLR, it's HID9[16]
<nickchan> not like that matters in practice already confirmed it does not exist on a11
<chadmed> whos going to be doing x86 emu on an iphone anyway :p
<chadmed> wel... i guess it's good that iboot is not encrypted now :/
<chadmed> this doesnt affect M3, only M4 (and all new socs going forward presumably) right?
<nickchan> chadmed: another thing
<nickchan> from some of the m1n1 m4 support code i think wfi is also broken somehow
<nickchan> deep wfi
<nickchan> and we use that and not having that would make for a really bad experience
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<chadmed> yeah id rather not go back to space heater laptops
<chadmed> theres no way thats being trapped to sptm or anything right
<nickchan> chadmed: i think power management things and cpu start stop things like that are handled by sptm because of state loss
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<chadmed> so if sptm is torn down due to a raw boot object we just lose deep wfi?
<nickchan> it does look like it assuming the m4 forks is not making a horribly incorrect assumption
<chadmed> thats fucking stupid and surely not intended
<chaos_princess> Is there any m4 fork that does chicken bits and wfi configuration correctly
<nickchan> chaos_princess: CYC_OVRD is supposedly completely inaccessible so there is no wfi configuration to speak of
<nickchan> and yuka's fork forced the a7-a11 code path on wfi which is a shallow wfi
<nickchan> and that means on m4 by default wfi is already the shallow wfi
<chaos_princess> Would be interesting to see if cyc_ovrd is inaccessible just in el2
<chadmed> if apple hid it in gl2 that would kinda defeat the purpose of doing this to make raw boot objects only see the in-spec architecture
<chadmed> dunno if arm would be happy about that
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<nickchan> chadmed: why would hiding cyc_ovrd defeat the purpose?
<nickchan> though I can see that will make people much more willing to play cat and mouse
<nickchan> space heater is unfun
<nickchan> there are some alternatives that have not been tried however like turning off cpu power domains in pmgr
<chadmed> nickchan: oh thats an apple register
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<sven> any of the deeper wfi states being broken would be very bad :(
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<maz> jannau: what was preventing this from working before my changes? I didn't really expect any functional difference with them.
<jannau> maz: it has 2 root ports which was incompatible with the bus_notifier approach
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<maz> jannau: huh, right. oh well, less code anyway, and additional functionality. too bad I can't afford that box! :)
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<jannau> I got it refurbished for a little bit over half price. still expensive though
<jannau> pcie setup is not fully working. the switch management endpoint is not working and the devices behind the switch only come up with PCIe gen1
<maz> yeah. it would take my M1 studio to die on me to be able to justify it. and even then, a 128 core Altra could make more sense, given what I do with it.
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<maz> I usually have to play all sort of command-line tricks to deal with PCIe switches...
<maz> do we have a native driver for the switch in this box? or relying on the generic Linux code?
<jannau> yes, switchtec. it's a microchip PM40100
<chaos_princess> jannau: oh, wow, i salute you and your wallet for that sacrifice.
<chaos_princess> did they fix device mappings on pcie in that box?
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<jannau> I haven't checked beyond quickly testing that old radeon hd4350
<jannau> maz: mem assigment breaks down with hotplug but if all devices are powered up before booting it mostly works after putting "bus-range = <0 8>;" in the device tree
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<jannau> not sure how to model the reset and power enable gpios of devices behind the switch in the devicetree
<maz> huh, what a mess.
<maz> I guess this should be part of describing the slots past the switch, but how to express that numbering is a mystery. wonder if there's prior art around that.
<maz> robher: any clue?
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<jannau> arch/arm64/boot/dts/qcom/sa8540p-ride.dts has a PM40028 switch but doesn't model devices behind the switch
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<fl0_id> why do you think they even still allow raw / custom boot objects, if they apparentyl locked down M4 so tightly?
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<chadmed> fl0_id: they locked down apple's extensions to the ARM ISA
<chadmed> the platform is designed explicitly to allow custom boot objects to exist. arm got shitty with them for letting those custom objects "see" all of apples not-ARM things
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<fl0_id> ah ok.
<fl0_id> thx
<fl0_id> and these just happen to be important bits I guess
<sven> it’s mostly annoying because our Hv for reverse engineering won’t work without these extensions
<sven> plus deep sleep states might be affected which would actually be important for running Linux
<LarstiQ> I don't suppose the blessed Arm ISA has working alternatives for those?
<fl0_id> sven yeah deep sleep states would be rly bad :/
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<sven> yeah, the rest we can (painfully) work around probably
<sven> but sleep might just be a bug, ie they just disabled everything and didn’t realize that the sleep msr is very important
<sven> or maybe it just works differently on m4. We don’t really know yet
<fl0_id> sure. thx for explaining
<sven> still all pretty far away since we need to get m1/2 upstream and then ideally bring up m3 directly upstream as well
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<fl0_id> yeah for sure
<fl0_id> main issue for me is time and that my m3 is also my work machine, soo I cannot boot it into m1n1 that often
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<sven> time is probably the issue for all of us :D
<fl0_id> yeah, not saying I'm unique haha
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<robher> maz: Certainly possible. PPC boots with all the PCI hierarchy described. The kernel can in fact generate the DT PCI nodes for you. Boot with CONFIG_PCI_DYNAMIC_OF_NODES enabled. Add what you need from the DT to your dts. Then add the GPIOs you need to handle.
<robher> maz: There's also a switch example on hikey970 (or 960 maybe?).
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<robher> maz: there's also the linux,pci-probe-only flag if keeping the firmware configuration is needed.
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<mischa85> well if there's a will there's a way
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<mischa85> nickchan: you mentioned trying disabling cpu power domains to gain write access to cyc_ovrd. how to? considering there's no ps-regs and the power registers are still unknown
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<kettenis> maz, robher: there also is CONFIG_PCI_PWRCTL now
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<kettenis> I believe that is the preferred way to power on PCI devices that are soldered onto a system board
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<chadmed> chaos_princess: do you have any thoughts on https://github.com/AsahiLinux/speakersafetyd/pull/26? my thoughts is to just leave this alone until we rip out the black box
<chadmed> cc flokli
<chadmed> for context: the black box is kinda useless now that the visense stuff is stable. id rather rip that out before merging this to eliminate some churn
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<chaos_princess> i am not clear as to how it fixes things? even with the boundary directory bit, are you still not leaving files owned by unassigned uid?
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<chadmed> seems that way yeah
<chadmed> the black box is also not really "state"
<chaos_princess> this feels like a feature that is for files that are owned by the unit and not accessed by anything else
<chadmed> you wouldnt call any other log file "state"
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<flokli> chadmed: what's in the black box
<flokli> Can we improve logging sufficiently, pipe everything needed to the journal during the crash handler?
<flokli> Ah, now reading "visense stuff is stable, we can rip it out"
<chaos_princess> blackbox is kinda like a core dump file
<chaos_princess> (it is a binary)
<flokli> Mmmh
<chadmed> no we cant pipe everything to the journal on crash because its PCM samples :p
<flokli> Heh
<chadmed> it doesnt matter, i will be ripping it out at some point sooni(ish)
<chadmed> then we can look at dynamic users
<chaos_princess> chadmed: json array of floats :P
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<chadmed> chaos_princess: you only need one column type in your database and it's JSONB
<flokli> chadmed: I'm happy to update the PR to drop the blackbox functionality, or rebase on top of such a change if you want to do it.
<chadmed> flokli: yeah hold off until i rip it out. ive got a bunch of other stuff to take care of first
<chaos_princess> Just let it sit for now, we can rebase it later
<chaos_princess> Not like there is a ton of changes happening to those files
<chadmed> i need to submit v4 of the codec patches upstream today without the tdm idle mask stuff. since that was the last controversial bit hopefully those get merged without a fuss
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<chadmed> i am deeply concerned about the fact that the upstream-approved tdm idle mask stuff ended up not working but i'll worry about that when it's worth worrying about
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