#asahi-dev on 2025-04-12 — irc logs at oftc.irclog.whitequark.org

00:03 <chadmed> did that dcp issue with multiple displays end up getting fixed?

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03:24 <halloy-user> hi

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05:21 <nickchan> turns out some of the socs breaks the cpu iorvbar pattern in /arm-io reg

05:21 <nickchan> should probably use /cpus/cpu<n> reg-private as fallback...

05:23 <nickchan> oh how fun

05:23 <nickchan> reg-private doesn't exist on ios 7 adt

05:23 <nickchan> i guess the fallback then becomes cpu-impl-reg -> reg-private -> /arm-io/ranges

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05:27 <nickchan> should split get iorvbar into its own functions too

05:27 <nickchan> given the complexity this incurs

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05:43 <nickchan> speaking of ios 7 it is still broken for other reasons in adt just fixing one by one

05:44 <nickchan> usually the older the version the more hardcoding needed

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18:23 <fl0_id> klausklaus is lina/marcan the same person or why did you mention them both?

18:25 <jannau> fl0_id: do not interact with that person. they were banned for repeated code of conduct violations

18:26 <fl0_id> jannau oh ok, sorry

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19:06 <mischa85> sven: about smp_start_secondaries: i don't see anything on the serial line other than Starting CPU 0 (0:0:0)... Failed! for example, M1N1 base right now is at 0x10005c68000 and cpu_impl_reg of cpu0 is 0x10010005c68001

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20:41 <alyssa> maz: Is the pcie series pending on something?

20:41 <alyssa> (Merge windows, I guess?)

20:41 <alyssa> IIRC it was fully reviewed

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