ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | Non-development talk: #asahi | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<chadmed> interesting development in the wireplumber space: apparently someone else has found a use for the DSP chain stuff we built and george and arun want to hack on it at the pw hackfest
<chadmed> i wish i could attend
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<sven> mischa85: uh, no. the point is to make wfi last longer but right now the core seems to exit that state pretty quickly again
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<sven> there's probably still some event firing in the background, maybe some timer
<sven> if there's the HW magic that decides between retention/non-retention it will probably only move to non-retention if nothing happened for a longer time
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<chaos_princess> isn't the event literally the read64 in the next line that causes proxyclient to write to serial?
<sven> I don’t think we use interrupts for usb
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<sven> or wait.. do we these days?
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<nickchan> sven: i think interrupts are not used
<mischa85> sven: yes, i realized. so this is why this experiment will need to be done on another cpu and doesn't work with only the boot cpu
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<mischa85> i can only say, the output is consistent
<mischa85> the timer idea would probably work to fire an interrupt but only with smp working
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<sven> why do you need another cpu?
<mischa85> to actually run the timer
<sven> i'm talking about the hardware timer
<sven> we use that in the hv as well
<sven> you can configure it to just trigger an interrupt which will wake you from wfi
<sven> but first you need to figure out what currently causes wfi to terminate
<mischa85> which was my first approach but the aic timer crashes as it's probably not enabled via pmgr
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<nickchan> mischa85: i do not think there is a timer in aic on 64-bit apple soc
<mischa85> it's defined in the adt tho
<mischa85> 0x302580000
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<nickchan> mischa85: can you not use the cpu register timers?
<nickchan> they should be standard ARM stuffs
<nickchan> and the interrupt of that timer is delivered as a FIQ
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<mischa85> but how can i poll that timer without causing an interrupt? maybe i'm just unsure here how to implement that
<nickchan> mischa85: you need an interrupt to wake from wfi...
<nickchan> as for polling the timer without causing interrupt that's what udelay() does already
<chadmed> mischa85: udelay implements a "timer" by just counting CNTPCT_EL0 ticks so you can use that i suppose
<chadmed> it's exposed to python
<nickchan> But that's the opposite of what one wants to do in a wfi experiments
<nickchan> it keeps the cpu busy
<nickchan> and other cores are not working so everything needs to happen on the boot cpu
<chadmed> yeah so we're stuck
<nickchan> configure the timer register to fire an interrupt after a second then call a function that does deep wfi
<sven> ^-- that
<sven> but first we need to figure out why wfi returns currently
<nickchan> and that function should write a magic value into x0, save x19-x30, wfi, restore x19-x30, then return
<nickchan> and x0 will end up being the return value so check that from the caller
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<sven> mischa85: when you tried to start the other cores did you do that with the m1n1 on disk or did you do a chainload to an updated m1n1 inbetween?
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<mischa85> m1n1 on disk
<sven> ok, that should've worked with the locked iorvbar values we checked earlier
<sven> pity. i was hoping there was a chainload inbetween and the only issue was that m1n1_base changed
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