<jernej>
apritzel: why too late? I'm not against new options in this regard
<jernej>
apritzel: I believe PXE DT overlay option idea was actually born by LE team and implemented by one of the devs
<jernej>
it was low hanging fruit
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<apritzel>
smaeul: you should have included more typoes in your U-Boot pinctrl mappings, to spice up the review a bit ;-)
<smaeul>
apritzel: and I'd feel better about resending the series for more than just one change
<apritzel>
smaeul: if that's the only thing, I will just fix it up
<apritzel>
let's see how it goes, I just finished the pinmux data review part, comparing against the manuals, SoC by SoC
<apritzel>
smaeul: one thing I noticed: there are now missing clock gates reported: starting USB...\nBus usb@1c1a000: sunxi_set_gate: (CLK#11) unhandled\nUSB EHCI 1.00
<apritzel>
jernej: smaeul: this is PLL_PERIPH, for instance, shall we actually model the gate bit, or introduce dummy clocks?
<smaeul>
I was fine with doing nothing and ignoring the warning :D
<smaeul>
we need to model clock rates for MMC anyway
<smaeul>
cf. the reference to clock_get_pll6()
<smaeul>
and the ofnode_get_addr() hack
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<apritzel>
smaeul: yeah, I am fine with modelling the MMC clock properly, I guess we now run out of excuses ;-)