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<apritzel> benettig: yes, mainline U-Boot won't work with FEL on the F1C100s, never did
<apritzel> benettig: indeed this requires this one patch, just use https://source.denx.de/u-boot/custodians/u-boot-sunxi/-/commits/master/
<benettig> apritzel: I've used that u-boot repository, I haven't mentioned it because you've quitted, so I've written all this here:
<benettig> and unfortunately it doesn't work :-/
<benettig> apritzel: tbh I've tested it on a F1C200s board, not LicheePi
<benettig> I need to find the one with soldered pins to connect serial port
<apritzel> benettig: mmh, interesting, thanks for testing
<benettig> apritzel: wait I give a go with Lichee, I've found the second one with soldered pins
<apritzel> I don't think it's F1C200 related, from all I know it's the same, just with more DRAM
<benettig> apritzel: yeah, honestly I think it's the same, but I give a try
<benettig> apritzel: does it work for you instead? On LicheePI?
<apritzel> the combination of the two works for me, on the LicheePi
<apritzel> but I need both: the U-Boot patch (other F1C100 trees worked as well), plus the sunxi-fel patch (or use Icenowy's branch)
<apritzel> with Icenowy's sunxi-tools you still need the U-Boot patch
<apritzel> (when using mainline)
<apritzel> benettig: oh, and do you have an oscilloscope, and can measure the SPI clock frequency?
<benettig> So to recap. It works for you with:
<benettig> and
<benettig> Correct?
<apritzel> yes
<benettig> :-/ not here on F1C200s, but let me check with 100s
<benettig> I'm finding the pinout
<benettig> I've disconnected it
<benettig> and I do have a scope
<benettig> do you need to know the SPI frequency so, right?
<benettig> apritzel: can you point me where to find the Licheepi-nano schematics? They seem gone anywhere
<benettig> apritzel: nevermind, I've found it at the first search. I've passed like 2 hours 1 month ago and nothing.
<benettig> file:///home/giuliobenetti/Downloads/lichee_nano_8.16(Schematic).pdf
<benettig> ehehe
<benettig> thank you!
<benettig> don't know I couldn't find it 1 month ago
<benettig> thx
<apritzel> so yeah, the F1C100 doesn't have a SPI modclock, so it's probably tied to AHB
<apritzel> but it would be good to know that for sure
<benettig> apritzel: ok for SPI
<benettig> I check it
<benettig> apritzel: now when I try sunxi-fel uboot it runs 12 times SPL with:
<benettig> U-Boot SPL 2022.01-22959-g7073bf7509 (Mar 03 2022 - 22:07:50 +0100)
<benettig> DRAM: 32 MiB
<benettig> Trying to boot from FEL
<benettig> sudo ./sunxi-fel uboot ../build-uboot/u-boot-sunxi-with-spl.bin
<benettig> But in host I still have the problem of:
<benettig> usb_bulk_send() ERROR -7: Operation timed out
<apritzel> benettig: if you try with sunxi-fel spiflash-read, it should be 6.25 MHz
<benettig> apritzel: now I check spi-flash speed
<benettig> apritzel: but is it correct to have the timeout in sunxi-fel? I mean, is it meant to be that way or not? I'm not used to sunxi-fel that much honestly
<apritzel> benettig: no, it should return
<benettig> apritzel: ok, so there is still the problem
<apritzel> the U-Boot build hash suggests that's the version you mentioned above
<apritzel> that's *not* the version ...
<benettig> apritzel: really?
<benettig> let me re-check
<apritzel> well, it's not sunxi/master
<benettig> apritzel: damn it, I've used f1c100s branch, that's why! Sorry
<apritzel> did you fetch/pull? that hash above was master until yesterday
<benettig> going to rebuild
<benettig> apritzel: yeah!! It works! Sorry for the false alarm!
<benettig> Now I check SPI flash clock
<apritzel> cool, thanks
<benettig> apritzel: 6.25Mhz confirmed!
<benettig> and that should also explain why I can read at 200Kb/s only
<apritzel> great, that means it's really the 200 MHz AHB being used as the clock source
<apritzel> benettig: well, sunxi-fel plays it safe, and uses 6 MHz, because that's what the BROM does as well, IIRC
<apritzel> it doesn't really know the board design or flash chip, so assumes the worst
<benettig> apritzel: ah yeah, it would be cool to tweak the prescaler to speed up the flash
<apritzel> benettig: well, you can do that in *your* copy, if you like, but for mainline we prefer a safe value
<benettig> only 6Mhz?
<benettig> ah
<benettig> sorry
<benettig> we should increase it with dts spi speed property
<benettig> is the driver in DT or legacy?
<apritzel> benettig: if you replace the CCM_SPI0_CLK_DIV_BY_32 with ..._BY_6, in sunxi-tools/fel-spiflash.c, it should go to 33.3 MHz
<apritzel> that's just the safe, hardcoded value to sunxi-tools
<apritzel> both U-Boot and Linux will use higher speeds
<benettig> I give a go using sunxi-fel itself to write on the address
<apritzel> U-Boot proper, that is, the SPL code also uses the slower rate
<benettig> to load the uboot to dram?
<apritzel> yes
<benettig> ah but yes
<benettig> it's only some 2-300KB
<apritzel> indeed
<benettig> I'm only thinking in production
<benettig> for sunxi-fel
<benettig> maybe a parameter is worth to set the spi speed
<benettig> s/speed/frequency
<apritzel> well, I think this is limited by the FEL speed anyway
<benettig> ah
<benettig> ah yes
<benettig> there are a lot of holes between the readings
<benettig> really bigger than the reads themselves
<benettig> too much overhead
<apritzel> ah, indeed
<apritzel> (and I was eyeing that Rigol too, although the 2 channel version only ;-)
<apritzel> I don't get it beyond 256 Kb/s, as reported by sunxi-fel
<benettig> :-) it's more than good enough to do this stuff.
<benettig> so sunxi-fel has that 14mS overhead
<benettig> or fel itself
<benettig> it's crazy, USB at least should go @1.5Mbps
<apritzel> both, somewhat, the implementation uses only a small buffer, so can't collect more data in one go
<benettig> apritzel: ah that makes a lot of sense. It's only that it scares me a bit for production
<benettig> ah no wait
<benettig> I only ignite uboot+linux+ramdisk
<benettig> and that's it
<benettig> as I've done with A20
<benettig> and then Linux takes over and shows the eMMC or Nand as mass storage
<benettig> so no problem
<benettig> well
<benettig> I correct the github issue and go to bed
<benettig> apritzel: thank you for improving sunxi-fel!
<apritzel> on the F1C100, the SPI buffer is only 4K, I might be playing around with making it bigger
<apritzel> and the FEL speed is limited by the OTG BROM implementation
<benettig> I think it's most of all the OTG BROM the problem
<benettig> the SPI buffer of 4K is pretty big. Flash should have 512 sectors(I think)
<apritzel> there are hints out there that you can switch to HighSpeed, with dramatic effects
<benettig> but on SPI side you mean?
<benettig> because the problem I see is the overhead of OTG BROM
<benettig> 14mS(OTG BROM overhead) VS 3mS(the reading)
<apritzel> well, but if you need less round trips, because the buffer is bigger, the overall speed should increase
<benettig> aah yes
<apritzel> so that makes 17 ms per 4K
<apritzel> when you could read 8k, it would make 20ms per 8K
<benettig> totally
<benettig> yes the timing calculations says the same 4096 bytes
<benettig> mmh
<apritzel> it's not trivial to increase the buffer size, though
<benettig> but, do you mean the buffer size created by sunxi-fel, right?
<benettig> because the SPI peripheral itself has 64 FIFO and that's it
<benettig> or they use DMA in some way
<apritzel> benettig: yes, sunxi-fel's buffer size, it's using the beginning of SRAM till the scratch address
<benettig> mmh, we have 40K total
<benettig> at least I see from Datasheet
<apritzel> yeah, but some of is used by the BROM FEL code
<benettig> aah
<apritzel> benettig: check this out: https://linux-sunxi.org/FEL/USBBoot#General_description_of_the_.22sunxi-fel_uboot.22_command_implementation
<benettig> oh 15K
<apritzel> it uses two stacks just in the middle of the SRAM, making our life extra painful
<benettig> I see
<benettig> crazy
<benettig> IRQ and FEL stacks
<benettig> so only 15K left for all
<apritzel> well, there if definitively more space, somewhere, it's just not trivial to find, and even harder in a upstreamable fashion
<apritzel> because the code needs to work for every SoC
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<apritzel> for production I would either boot of SD card, then use a U-Boot script and flash using U-Boot's sf command
<apritzel> or just load U-Boot, then use U-Boot's OTG code, for instance via fastboot
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<apritzel> but it's a bit more tricky to setup
<benettig> apritzel: yes, exactly
<benettig> it's like how I do now for all A20/A33 etc.
<apritzel> and from what I saw, I guess the auto-script feature of sunxi-fel wouldn't work
<apritzel> (on the F1C100, at the moment)
<benettig> oh, I'm very new to sunxi-fel so I've never tried it out
<benettig> anyway I think this is already a very good result
<apritzel> basically you can upload a U-Boot script, and U-Boot would *automatically* execute that
<benettig> if increasing speed could lead to double the throughput, so let's say 400-450KB/s
<benettig> apritzel: yes exactly what I do
<benettig> already
<benettig> that in the end is the same stuff i.MX stuff does
<benettig> same goes for TI
<benettig> and so on
<benettig> i.MX6 uses mfgtools that loads uboot+linux and communicate
<benettig> but for my needs it's easier u-boot+ums and that's it
<benettig> apritzel: well, need to go to bed
<benettig> apritzel: it's been a pleasure :-) Ping me if you need some help. I try to arrange with all other activities
<apritzel> alright, have a good rest
<benettig> Thank you, talk soon
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<jernej> well, maybe new AW SoCs won't be without GPU driver: https://www.phoronix.com/scan.php?page=news_item&px=Open-Source-PowerVR-Vulkan
<anarsoul> I think it's only for their newer GPUs
<jernej> sure, but few days ago was talk about new AW SoC with new PowerVR GPU
<jernej> *there
<jernej> although, looking at that now, I'm not sure which PowerVR GPU should be present
<jernej> gamiee: which soc did you have in mind when talking about PowerVR GPU?
<gamiee> jernej: hi, I meant A133
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<ndufresne> MT8173 isn't exactly "new", so that probably includes quite some HW, seems like a good news for sure
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