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<kuba2k2> what is the relationship between NAND ECC strength (in bits) and ecc_bytes[] in spl_nand driver?
<kuba2k2> my Micron NAND has minimal ECC params (from datasheet) as 24-bits per 1080 bytes of data, but the sunxi SPL driver chip detection changes stuff like ecc_bytes, ecc_size (sector size?), max_oobsize, page_size (this one is obvious)
<kuba2k2> ecc_bytes[] ranges from 32 to 116, I don't quite see how is my 24-bit ECC related to anything from above
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<kuba2k2> The stock LiveSuit flasher shows (in the uart log) 8 sectors in a page, which gives 4096/8=512 bytes per sector. It also mentions BCH-32 , while SPL seems to detect correct config as 1024 bytes ECC size and 32 bytes ECC strength
<kuba2k2> These settings don't allow reading any page though
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<BroderTuck> I suspect the LiveSuit program uses the Android NAND layout, and as far as i know the (mainline) Linux and the Android layouts for things like where the ECC bits and the bad block markers are stored are utterly incompatible between the two.
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<kuba2k2> okay, that makes sense. But if the sunxi u-boot uses hardware ECC (which I believe it does), doesn't the NAND controller handle ECC stuff by itself? In the source code I found that reading pages and checking ECC is more or less writing/reading a few registers
<kuba2k2> I also tried writing to NAND using mainline u-boot itself; u-boot could read the image properly, but SPL still can't read even a single page. It detects ecc_bytes as 24 in that case
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