13:38 <szemzoa> I tried to run the smaeul's github kernel for D1 on T113-S3 with mixed results. I removed the cpu and plic node from the dtsi, added the armv7 cpu and gic nodes, and modified the periph interrupts for the gic (GIC_SPI n-16 from the RISCV n), and added an arm_arch_timer. I also compiled the d1-ccu driver (removed the RISCV dep). Definitely I missed somehing :) This is the result: https://pastebin.com/P0t09qPk

13:42 <smaeul> looks like your GIC setup is broken

13:52 <szemzoa> smaeul: you mean in the .dtsi?

13:53 <szemzoa> becouse the bloader can start the allwinner supplied kernel w/o error

14:40 <apritzel> szemzoa: what's your GIC DT node? The one from the sun50-h6.dtsi should be a fit

14:41 <szemzoa> gic: interrupt-controller@3020000 {

14:41 <szemzoa> compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";

14:41 <szemzoa> #interrupt-cells = <3>;

14:41 <szemzoa> #address-cells = <0>;

14:41 <szemzoa> device_type = "gic";

14:41 <szemzoa> interrupt-controller;

14:41 <szemzoa> reg = <0x0 0x03021000 0 0x1000>, /* GIC Dist */

14:41 <szemzoa> <0x0 0x03022000 0 0x2000>, /* GIC CPU */

14:41 <szemzoa> <0x0 0x03024000 0 0x2000>, /* GIC VCPU Control */

14:41 <szemzoa> <0x0 0x03026000 0 0x2000>; /* GIC VCPU */

14:41 <szemzoa> interrupts = <GIC_PPI 9 0xf04>; /* GIC Maintenence IRQ */

14:41 <szemzoa> };

14:44 <libv> szemzoa: use pastebin please

14:44 <szemzoa> libv: ok, sry

14:45 <apritzel> that looks roughly OK (some minor issues, but shouldn't affect functionality). Do you have #address-cells and #size-cells set to 2 in the parent node?

14:46 <apritzel> (because smaeul's version uses <1> for both there)

14:47 <apritzel> szemzoa: and your version seems to rely on <2>

14:52 <szemzoa> apritzel: with that GIC setup, the PPI error gone: https://pastebin.com/GqiYau62

14:56 <szemzoa> if I set the address and size cells to 2 I got a lot of DTC errors, BTW, this is the .dtsi: https://pastebin.com/W2yXJ49b

14:57 <apritzel> yeah, you shouldn't set it to 2, it's just that you have two cells in your GIC reg property. Keep #a-c and #s-c at 1, but remove the 0s in the reg property

15:00 <apritzel> szemzoa: that one you just posted looks good, you should just use GIC_CPU_MASK_SIMPLE(2) in the GIC and arch timer nodes

15:01 <apritzel> szemzoa: what is that "Allwinner T113-loader"?

15:07 <szemzoa> apritzel: https://github.com/szemzoa/awboot

15:14 <apritzel> szemzoa: ah, thanks. I started looking at a U-Boot port, beginning with proper pinctrl/GPIO support

15:17 <jernej> apritzel: I'm still skeptical about how clock is modeled in your AC200 series. I think audio codec also needs it and if anything, two staged model would be better (AC200 as clock user and provider).

15:17 <jernej> I hope I'll have something working in a week or two

15:25 <szemzoa> apritzel: yes, I tried that too, but writing a very simple bootloader was easier for me. This GIC setup helped, THANKS, even the second core comes up, before it freeze :) https://pastebin.com/iaZ7UWdn

15:43 <apritzel> szemzoa: this "genirq: Setting trigger mode 4 for irq 35 failed (gic_set_type+0x0/0xa0)" still suggests something is fishy

15:52 <szemzoa> apritzel: in the last log, that errors are disappeared too, not?

15:54 <apritzel> ah, right, got lost in the tabs ...

15:55 <apritzel> szemzoa: but do you see a prompt? or at least the panic for not finding a rootfs?

15:57 <apritzel> jernej: which clock are you concerned about, specifically? The clock that is exported by the "ephy-ctl" device is just the gate for the PHY

15:58 <apritzel> jernej: so the AC200 MFD parent is a clock user, and some kind of "internal provider", to its children

17:47 <jernej> apritzel: well, I still think making mfd device clock provider would make more sense, because it provides clock to subdevices

17:47 <jernej> for example, audio codec also needs clock

17:47 <jernej> and tve

17:48 <jernej> apritzel: btw, in 6.0-rc2, I get crash in mdiobus_register_clock()

18:19 <jernej> apritzel: kasan reports that __devm_clk_hw_register_gate underallocates something

18:21 <jernej> apparently struct clk_gate, but I don't see how

18:21 <jernej> you expanded this structure, sure, but compiler should figure out it's size, unless there are clever tricks used somewhere

22:04 <apritzel> jernej: thanks, I will have a look

22:07 <jernej> apritzel: I think I found the issue, I left comments on your commits

22:07 <jernej> anyway, it still doesn't work for me

22:08 <jernej> from what I can tell, clock is not enabled