ChanServ changed the topic of #linux-sunxi to: Allwinner/sunxi development - Did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait for an answer! - This channel is logged at https://oftc.irclog.whitequark.org/linux-sunxi
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<swiftgeek> looks like 5.15.60 is fine for me
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Guest21 is now known as aperezdc
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<megi> anyone knows what's the point of LPAE on A64 https://megous.com/dl/tmp/b8aa8ff2d12b360d.png ? can it be used to extend physical address space somehow to advertised 40 bits? https://en.wikipedia.org/wiki/ARM_architecture_family#LPAE
<megi> or would those extra address lines not be wired to memory controller?
<megi> or maybe this is just armv7-a/aarch32 execution state thing, and pointless in aarch64 mode?
<jakllsch> yeah, probably only relevant to 32-bit CPU modes
<megi> kinda confusing that it's named as *physical* address extension, hm
<megi> nevermind, then :)
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<jakllsch> a 64-bit processor almost always has the capability to support 64-bit physical addressing
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<apritzel> megi: yeah, LPAE is a pure ARMv7 feature. It's implemented using the "long-descriptor translation table format", which is very similar to the ARMv8 AArch64 format
<apritzel> megi: ARMv8.0 supports 48 bits for both VA and PA, and ARMv8.2 introduced extensions do extend this to 52 bits (for both)
<apritzel> AFAIK a Cortex-A53 only supports up to 40 bits of PA - not that this would matter for Allwinner SoCs :-D
<megi> thanks :)
<apritzel> so looks like someone tried to add just another bullet point ;-)
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