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<MoeIcenowy> apritzel: got a weird H6 board that its RSB cannot run at 3MHz
<MoeIcenowy> (or even 1MHz)
<MoeIcenowy> (RP-H6C
<gamiee> H6 is still manufactured? :o
<MoeIcenowy> I got the board 2 yrs ago
<gamiee> Oh :(
<MoeIcenowy> and I think H6 is still manufactured
<MoeIcenowy> it's listed on www.allwinnertech.com
<gamiee> That's true, and H5 is missing, so that's not probably manufactured.
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<apritzel> MoeIcenowy: Does I2C work, to talk to the AXP? Or can you tune down the RSB frequency to something stable?
<MoeIcenowy> apritzel: I tuned it to 100kHz, it works
<MoeIcenowy> but I don't know why I2C does not work
<MoeIcenowy> maybe because the ATF fails
<MoeIcenowy> ATF says `ERROR:   RSB: read command: 0x103`
<MoeIcenowy> so it may just left the PMIC in RSB mode
<MoeIcenowy> and then it cannot work as I2C slave again
<MoeIcenowy> BTW should we lower the H6 ATF RSB frequency to 100k?
<MoeIcenowy> or 400k
<MoeIcenowy> because H6 does not officially has RSB
<MoeIcenowy> and the PCB design may not satisfy 3M
<apritzel> MoeIcenowy: so far there have been no complaints about that
<apritzel> but we can turn the AXP back to I2C if it fails
<apritzel> I think we need to do something there anyways, IIRC there was some reboot problem with some SoC, because of RSB vs. I2C?
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<MoeIcenowy> apritzel: or maybe ATF should parse the DT PMIC bus configuration
<MoeIcenowy> and use what is specified to it
<MoeIcenowy> e.g. using RSB is not a good idea on the shared bus of Pine H64
<apritzel> MoeIcenowy: yeah, good point. Becomes more feasible if there are now two boards showing issues
<MoeIcenowy> well the RP-H6 issue is just a bus not capable of 3MHz RSB
<MoeIcenowy> does the Pine H64 show any issue now?
<MoeIcenowy> I just think using RSB not so appropriate, I don't know whether it works or not in real life
<apritzel> I have been using the Pine H64 without issues, I guess the RTC just ignores the "random noise" on its SDA/SCL lines when TF-A is running?
<apritzel> Not sure why there is a separate RTC anyway ...
<MoeIcenowy> apritzel: Allwinner people said to Pine64 that the leakage of integrated RTC is high
<MoeIcenowy> in fact I always hear that the integrated RTC of allwinner chips can only hold some months with a CR2032
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<apritzel> like if anyone would use the RTC with a button cell on a PineH64 or would care to have an RTC in the first place ;-)
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<MoeIcenowy> apritzel: well one of my friend really care about the RTC on Pine H64
<apritzel> sure, but I wonder if it is that important to solder a separate chip on a cheap dev board
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<MoeIcenowy> apritzel: ah btw my rp-h6b has an extra rtc chip too
<MoeIcenowy> and a cell battery slot
<apritzel> well, but that looks like a serious (professional) devboard
<smaeul> there may not be space to put both I2C and RSB drivers in TF-A
<MoeIcenowy> smaeul: this sounds weird
<MoeIcenowy> I2C sounds a good fallback, but it could not cooperate with PMICs already set to RSB
<smaeul> we already switch the PMIC back to I2C mode, so the easiest solution would be to reduce the frequency but keep using RSB
<smaeul> but that may cause problems with boards having non-PMIC peripherals on that bus -- would the RTC still handled the "noise" from 100 kHz RSB?
<smaeul> btw I have a series for adding an AXP regulator driver to U-Boot, and using it for EMAC and HDMI -- was there anything else relying on TF-A for regulators?
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<apritzel> smaeul: oh great! Those two were the main devices I remember. If we find more, we can handle them later, I guess.
<apritzel> MoeIcenowy: we are pretty much space constrained in TF-A, especially since we need to leave some room for crust
<apritzel> jernej: I've been told about a H616 TV box with LPDDR3 DRAM (X96QPro, see the wiki), which shows "This DRAM setup is currently not supported."
<apritzel> jernej: do you have any hints already, or is it the old game of going back and dumping registers and comparing boot0 and so on?
<jernej> apritzel: which one is currently implement?
<jernej> DDR3?
<apritzel> yes, the other way around as with the H6
<jernej> LPDDR3 needs just small adjustments in PHY setup and of course, its own timing profile
<jernej> it should be easy to add
<jernej> but I only do that with HW :)
<jernej> I mean I only add DRAM support for HW that I have
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<apritzel> jernej: many thanks, and I totally understand
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<apritzel> smaeul: hi, do you know how to enter FEL mode when running from a TOC0 image? The good ol' "b 0x20" doesn't seem to work?
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<apritzel> Presumably it's still the SBROM mapped, which doesn't have the FEL entry point at that address, possibly not even a FEL entry point at all?
<apritzel> this is on an A64
<smaeul> yeah, there's a stub that switches to NBROM
<smaeul> jump to 0x64 instead
<smaeul> apritzel: ^