#linux-sunxi on 2023-01-08 — irc logs at oftc.irclog.whitequark.org

2022-12-21 00:44 ChanServ changed the topic of #linux-sunxi to: Allwinner/sunxi development - Did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait for an answer! - This channel is logged at https://oftc.irclog.whitequark.org/linux-sunxi

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05:39 <junari> apritzel: I checked with osciloscope, 1200 mv (70 step) set working

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12:08 <apritzel> junari_: very nice, thanks! I will email Martin about it

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15:09 <junari> Trying to run LPDDR3 on H616. Faced with a situation that the memory does not pass the functions mctl_auto_detect_rank_width() and mctl_auto_detect_dram_size()

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15:11 <junari> In this case in vendor's SPL actions that are not entirely clear to me

15:11 <junari> Registers 0x70000000, 0x80000000 0xa0000000 are written.

15:16 <apritzel> what "registers" do you mean, exactly? The last two addresses are in DRAM. There are algorithms that write into DRAM to look for aliasing, but 0x70000000 does not fit in there

15:20 <junari> Yes, that's right, it's RAM

15:21 <junari> from 0x40000000 to 0x13FFFFFFF

15:21 <junari> tangled up in zeros

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15:29 <junari> Looks like vendor SPL simply writes to certain areas of memory to find out its size

15:43 <MoeIcenowy> junari: in fact we are also just writing to certain address to detect the size

15:43 <MoeIcenowy> because we're detecting the wrapping up

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15:44 <MoeIcenowy> my computer principle lesson knowledge tells me DRAMs has rows and columns

15:44 <MoeIcenowy> (and modern DRAMs has banks / bankgroups (bankgroups are so modern that they come at (LP)DDR4)

15:45 <MoeIcenowy> the principle of size auto detect is to set 1 of the 3 parameters to the maximum, and others to the minimum

15:45 <MoeIcenowy> and detect wrapping up

15:45 <MoeIcenowy> and decrease the testing parameter (which is set to the maximum) unless no wrapping up happens

15:47 <junari> MoeIcenowy: Yes, I saw it in the driver code

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15:49 <junari> But, probably, for some memory chips this method is not suitable

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15:49 <MoeIcenowy> junari: why

15:49 <apritzel> ah, sure 0x70000000 is DRAM as well, was looking at the F1C100s too much in the last days ... ;-)

15:49 <MoeIcenowy> BTW detecting rank/width is another story

15:50 <MoeIcenowy> because rank means CS pins, detecting rank means testing whether a memory module is present when some CS pins is asserted

15:50 <MoeIcenowy> and width means DQ pins, detecting it is detecting whether some DQ pins are floating/hardwired

15:51 <junari> I dont know. But in the vendor SPL code for this case there are separate function

15:52 <apritzel> I wouldn't interpret too much into vendor code, tbh. A lot of stuff I have seen is just bad code

15:52 <junari> Here pseudocode from ghidra https://pastebin.com/6rSdaJwH

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15:54 <junari> It is used for 1,5 and 3 gigabytes of DRAM

15:55 <MoeIcenowy> yes 1.5/3gb dram is strange

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15:56 <junari> In my case its KMQ310006A-B419 emcp by samsung

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15:58 <apritzel> junari: what device is this? a H616 TV box?

15:58 <junari> Yes

15:59 <apritzel> are you using jernej's latest H616 DRAM rework patches?

15:59 <junari> Yes

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15:59 <apritzel> good!

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16:25 <apritzel> junari: did you find a datasheet for this chip? Some quick googling didn't produce any good results

16:26 <junari> apritzel: nope

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