ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | Non-development talk: #asahi | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<marcan> yeah, wake on keyboard is not implemented
<marcan> IRQ behavior on s2idle is opt-in, right now we opt in all mailboxes under the assumption that mostly everything but SMC will be shut down anyway
<marcan> but not SPI (and then the driver would need a codepath to trigger the wakeup anyway)
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<povik> haha, so the I2S ports are hooked up to GPIO after all
<povik> i could have made such good use of this when i was figuring out MCA
<povik> why didnt i try mon.add(gpio_base, xxx) and enable/disable the I2S clocks earlier?
<sven> i feel like almost everything is somehow hooked up as GPIO as well :D
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<sven> lol, so thunderbolt hotplug seems to work pretty well. it just doesn't detect the adapter the first time for some reason
<sven> pcie is still kinda broken though
<sven> 0001:00:00.0 PCI bridge: Apple Inc. Apple Silicon USB4/Thunderbolt PCI Express Root Port
<sven> 0001:01:00.0 PCI bridge: Intel Corporation DSL2210 Thunderbolt Controller [Port Ridge 1C 2011]
<sven> pretty sure the second thing is a lie :D
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<sven> oh... wait... pcie has tunables as well, doesn't it?
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<sven> wait.. or maybe that's the 3->2 adapter showing up
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<jannau> sven DSL2210 seems to be a thunderbolt 1 device controller so that is might already be on the ethernet adapter
<sven> https://paste.debian.net/hidden/2c372cad/ looks like i might've messed up something when describing the bus in the dt, let me double check that
<jannau> it is on the thunderbolt to firewire adapter
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<sven> 0001:00:00.0 PCI bridge: Apple Inc. Apple Silicon USB4/Thunderbolt PCI Express Root Port
<sven> 0001:01:00.0 PCI bridge: Intel Corporation DSL2210 Thunderbolt Controller [Port Ridge 1C 2011]
<sven> 0001:02:00.0 PCI bridge: Intel Corporation DSL2210 Thunderbolt Controller [Port Ridge 1C 2011]
<sven> 0001:03:00.0 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM57762 Gigabit Ethernet PCIe
<sven> \o/
<sven> DMA is obviously broken since there's no IOMMU
<sven> and I need to read code to understand how the kernel handles hotplug management because right now this is only works with even more ugly hacks
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<maz> sven: awesome!
<maz> do you get the interrupt on the RP when plugging in the device? this should be what triggers the rescan.
<sven> it's a bit more ugly. I need to wait for the Thunderbolt NHI to activate the PCIe link and only then clear some "tunnel reset" bit and then trigger the link-training and only then the "port up" interrupt appears
<maz> two state machine intersecting. what's not to love? :-/
<sven> it gets even better. the DART MMIO range only starts to work once PERST is disabled
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<povik> "product state space"
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<sven> and ofc this is all triggered by that lovely PD controller
<maz> sven: "insert DART enable >here<"
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<povik> oh hello
* maz starts counting pennies
<povik> no streamed event this time?
<povik> i have learned to like them
* sven tries to resists the temptation
<ChaosPrincess> oh, hey wifi6e finally
<jannau> with wifi 6e and hdmi 2.1 apparently
<j`ey> hm £2000 for one with upgraded CPU/RAM
<jannau> 19/38 gpu cores
<jannau> apparently also new mac mini
<j`ey> 8 core with 24GB ram is 1200gbp.. tough choice
<j`ey> (what I was quoting was the mac mini)
<jannau> with m2 pro
<j`ey> is it 8p4e with the 12 core?
<jannau> yes
<jannau> 10 core is 6p4e
* maz starts looking at ebay for a second-hand M1 mini...
<jannau> m2 mini tech specs say thunderbolt 4 ports and supports two displays over thunderbolt
<sven> huh
<sven> so maybe the also used that tiled display support to support two displays? :D
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<sven> or is there a pro/max in that mini as well?
<jannau> no, for the base m2
<jannau> it looks like they can somehow route dcp over thunderbolt
<ChaosPrincess> sven: it appears they route the hdmi output to tb now
<sven> ohh.. fancy
<sven> also a pity though
<ChaosPrincess> cause it is thunderbolt + thunderbolt or hdmi
<jannau> the second thunderbolt display seems to exclude hdmi
<sven> so, uh, do they have another display crossbar on the m2?
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* amarioguy hopes they solved the serror bug
<maz> here's to hope!
<maz> though TBH, it isn't too hard to work around.
<kettenis> wouldn't get my hopes up
<ChaosPrincess> would be nice to see device trees for those machines
<maz> what I'd really like is a mask on the vgic maintenance interrupt. can't imagine that happening either (and I wouldn't know where to look)
<ChaosPrincess> but ipsws aren't up yet
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<kettenis> wonder if they stayed with the Broadcom BCM5776x for the 1G Ethernet on the mini
<maz> time to start building a 4th serial dongle, just in case...
<kettenis> what did you use to build those?
<maz> RPi Pico, FUSB302 on an adapter board, various level shifters for the uart and VBUS.
<maz> I have half of a proper PCB designed, but need time to finish it...
<jannau> 8k 60 Hz HDMI seems to require two dcpext
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<maz> kettenis: this is what it looks like: http://www.loen.fr/tmp/PXL_20230115_121106090.MP.jpg
<sven> :D
<sven> let me know if you finish that pcb. i'd be interested in a real serial adapter as well
<kettenis> a bit neater than what bluerise rigged together for me
<maz> what I like about it is that the pico is the serial adapter. and in theory, one adapter could deal with two FUSB302 (one per I2C bus), which is useful when you have multiple boxes.
<maz> the expensive part here was the QFN adapter being delivered from Canada.
<maz> the PCB would solve that problem.
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<nicolas17> ChaosPrincess: speculation was product announcement 11am, betas 1pm
<sven> [ 3.460700] thunderbolt-apple-cio 501f00000.nhi: Port 6: 5ac:2000 (Revision: 0, TB Version: 1, Type: DP/HDMI (0xe0101))
<sven> aaaand there's the thunderbolt DP tunnel
<sven> which also seems to come up at least on the NHI side when I connected my old thunderbolt display via apple's 3->2 adapter
<sven> so I guess we'll have to come up with some kind of NHI -> {pcie, dpin0-phy, dpin1-phy} notification system anyway
<sven> on intel/amd controller this all happens without additional software notifications :(
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<eiln> holy shit
<eiln> iovas are a function of access distance
<eiln> i'm getting a 4x speedup with a capped iova limit
<eiln> 0.002398727 per batch for inception_v3
<nicolas17> ANE?
<eiln> yes
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<jannau> I wonder whether the display out switching will work on the m2 laptops too. 2 external displays in clamshell mode could be interesting. I doubt apple will support that in macos
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<sven> huh, that would be useful
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<vivithecanine> 2 external in clamshell works fine on mbp m1 max
<vivithecanine> 3 works fine even
<vivithecanine> I think the max does a total of 5 displays?
<sven> for the pro/max chips, not for the base m1/m2 variant
<jannau> this would be for the m2 mb air and and pro 13" which support only 1 external display officially
<marcan> < sven> pretty sure the second thing is a lie :D
<marcan> no that tracks
<sven> yeah, nvm, i'm just an idiot
<marcan> that intel chip should be what's in the dongle bridging to PCIe
<sven> the config space was just completely messed up because I unplugged the adapter and that's why I assumed it was broken
<marcan> heh
<sven> this currently runs on essentially duct tape so i'll have to clean that up and then figure out how to get that DART up sanely
<marcan> also, for the DART, vague idea I had was to play with runtime-pm somehow? like have the DART driver defer doing anything and start up in rpm sleep state, only to be woken up when the PCIe dependency needs it. or something something.
<marcan> either that or maybe trigger on IOMMU domain attach? not sure if that would work
<sven> yeah, i have some ideas.
<sven> i'll see what happens if I just fake a clock controller for now just to see if that breaks already
<sven> it might just work because it technically doesn't need the DART before the first device comes up
<marcan> how would that work?
<marcan> you mean have the DART depend on a clock supplied by PCIe?
<marcan> can you bring that up independent of any thunderbolt/hotplug/etc stuff?
<sven> yup
<sven> turns out I can just leave the thunderbolt stuff up the entire time because it's much less broken than dwc3
<marcan> oh lol
<marcan> sure, as long as we can still sanely power sequence it to off for power saving
<marcan> but that should work ish with the rpm stuff I think?
<marcan> though I still need to figure out rpm for the DARTs properly
<jannau> runtime pm might be annoying, the internal pcie devices are runtime pm enabled on probe_device
<sven> I actually haven't figured out how to bring it down without resetting the entire soc yet :D
<marcan> lol ok
<sven> but it should be possible, just need to figure out the right atcphy/acio sequence there
<sven> I think I know it but since this is all duct taped together I can't easily test it
<sven> if you mess that one up though you either get SErrors on pcie/acio MMIO access or some internal watchdog just resets everything
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<jannau> marcan: with https://github.com/jannau/linux/commit/e941a3e8a1dd7ecdcaa032d1fe75b2fb97ccff3c there is at least no breakage with DART runtime PM, not sure if runtime PM would work correctly if any of the pcie drivers supported it
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<povik> finally got some IV sense curves: https://ibb.co/5KWrpg1
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<povik> the curves are roughly overlaid because TI chose the units in a ~3.7 ohm ratio (understandably)
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<marcan> povik: nice! :D
<marcan> kinda surprising it's that jagged though, unless the input wasn't a sine wave?
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<sven> okay, removing and plugging in again works when I manually set that tunnel reset but again inbetween as well
<sven> *bit
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<jannau> any idea how to wake from s2idle in upstream v6.2-rc4 (without macsmc)? I tried enabling wakeup for usb devices and ttySAC0 but both don't appear to work
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<povik> marcan: this was a sine wave, played not too loud
<povik> huh, datasheet says noise should be at -60 dB, which i would expect to look less jagged
<povik> this is the spectral density: https://ibb.co/kSzwzst
<povik> yeah, but the -60 dB figure is quoted at 5 W, and if i didn't miscalculate i only drove 10 mW to it
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<eiln> rough benchmark & progress https://pastebin.com/UGyeNH6T :)
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<jannau> sigh, 16GB to 32GB m2 pro RAM upgrade cost as much as the 32GB to 64GB
<j`ey> weird that you can only get pro m2 mini and not max
<nicolas17> max is reserved for Mac Studio 2023 maybe?
<nicolas17> btw looks like MBP 14" M2 Pro is "j414"
<jannau> j414s probably
<nicolas17> the raw thing I found (from a regulatory listing) was "J414 A2779 MBP 14 SG/10C/16C GPU/16G/512G-USA~||~MPHF3"
<jannau> still no new 13.2 beta/rc
<nicolas17> I wonder what "SG" means
<nicolas17> Space Gray maybe
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<nicolas17> FCC wireless testing documents also mentioned these new machines running macOS 22A8375 and 22A12320r (ie. macOS 13.0),
<nicolas17> sometimes I need another reminder of how long hardware production cycles are :p
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<jannau> did anyone already ran ventura 13.2 beta or earlier in the HV? panics here immediately with "trust cache module 0 has unsupported version 2 @trustcache.c:113" and some AppleImage4 errors before
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