marcan changed the topic of #asahi to: Asahi Linux: porting Linux to Apple Silicon macs | General project discussion | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Topics: #asahi-dev #asahi-re #asahi-gpu #asahi-offtopic | Keep things on topic | Logs: https://alx.sh/l/asahi
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<marcan> always fun to bisect a GPU driver bug down to a memory coherency change
* marcan throws it over to the mesa folks to look at
<marcan> at least my menus aren't flashing any more
<marcan> at least the repro is trivial
<marcan> but it was a layer 2 bisect
<j_ey> layer 2?
<marcan> bisecting to a commit that exposes the bug but isn't the bug, then having to bisect again adding that
<j_ey> aha
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<arnd> j_ey: that looks like a scary bug on the i.MX, I hope it's an SoC specific issue rather than a fundamental issue in the way we think of the barriers
<Emantor> I wouldn't even be remotely surprised if this is an i.MX8Q* issue…
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<marcan> it's great when you work for a few hours on a bunch of code and the end result is everything works exactly the way it did before and no new features have been added :P
<marcan> (...yet)
<hell__> I think this is called "refactoring"
<marcan> yup
<marcan> async MMIO tracing now uses the stacked tracer concept I mentioned above (sync/hooks are still TODO)
<quarkyalice> yeah I've been there
<marcan> one thing this does do is fix the "clobbering the vuart" problem
<quarkyalice> refactoring can be quite useful for cleaning up and creating more readable code
<marcan> pagetable updates are now automatically done based on whatever tracers you configure, and it keeps track of dirty sections and updates as necessary
<marcan> and also flushes the TLBs
<marcan> quarkyalice: or in this case preparing for new features later (and fixing problems)
<quarkyalice> there's been times when I've changed one line of code and broken an entire project by creating a cascade of problems that need fixing :P
<marcan> I mean I basically changed the entire way MMIO tracing works
<marcan> ... it's just that there is a default tracer now that just so happens to implement the same exact behavior the old code had
<marcan> (and which is configured the same way)
<hell__> I... once caused build failures by replacing license headers. (some uses of "dead code" macros that used the line number to declare undefined functions ended up having the same line number in the same compilation unit)
* hell__ likes to use reproducible builds to verify the bulk of changes when refactoring stuff, especially when testing is impractical (e.g. missing the necessary hardware, or way too many variables to account for with testing)
<j_ey> marcan: is it re-doing the whole page tables in pt_update?
<marcan> j_ey: no, only the parts that changed
<marcan> that's what that dirty_maps thing is for
<marcan> and if it's empty (which is a cheap check) it does nothing
<marcan> so now I automatically call pt_update after every exception before returning to the guest
<j_ey> oh right, i see. and if it's tracemode.OFF... it just maps_hw
<marcan> yup
<marcan> so now the base MMIO map is actually a "HW" OFF tracer that underlies the entire address range
<marcan> (originally I wasn't going to do that but it turns out that's the easiest way, code-wise, instead of trying to fill in holes in the RangeMap with map_hw)
<j_ey> marcan: just to clarify, think im having a bit of a brainfart, hv_handle_dabort is only meant to be for SPTEs right?
<marcan> yes; that path triggers when you forget to invalidate the TLBs :-)
<marcan> otherwise it should never happen since the CPU should have taken care of it
<marcan> well, and also for actual missing maps (which means the guest accessed nonexistent hardware or you forgot to map a range)
<j_ey> I was trying to convince myself that hw_map() when TraceMade.OFF doesnt call into C/python
<marcan> hw_map(), modulo unaligned sub-page maps, creates real page table mappings
<marcan> that are therefore handled by the MMU as stage 2 translation
<marcan> (I did make the python side fall back to sw_map for weird alignment or sub-page chunks at the start and end, because it makes the rest of the code easier to write instead of having to deal with the page-alignment requirement of the underlying hv_map() in hw mode)
<marcan> (so in those unaligned cases it will go through C)
<marcan> basically the HW alignment is 16K and the SW alignment is 4b (due to the extra fake pagetable level I maintain, which only works for SPTEs)
<marcan> note that this isn't massively different from what I was doing earlier; the commit replaces a hw_map of the entire MMIO range with setting up the HW tracer
<marcan> the main difference is before we were stacking and mutating page tables (map everything hw, replace some bits with sw maps)
<marcan> while now since it gets coalesced and updated rangewise, it'll hw_map a bit, sw_map a bit, hw_map a bit, etc in address order, without overlaps
<marcan> (which in this case does ~double the number of proxy calls but whatever)
<marcan> j_ey: oh that will go through C
<marcan> but that's the point
<marcan> that's asking for a mmiotrace of everything
<marcan> so that'll map_sw everything with async tracing turned on
<marcan> so again that's no different from the map_sw it replaces :-)
<marcan> yes, that one
<marcan> with the trace_all script you end up with this page table: https://mrcn.st/p/suiSn7HJ
<marcan> which is PrintTracer everything except the exceptions in that script, and the PMU hack, and VUART
<marcan> so next up will be building the scaffolding for easily writing higher level tracers with RegMaps, and finishing the sync/hook support (which is broken/not finished right now)
<j_ey> I appreciate the tests for regmaps :)
<marcan> there's no way to make that kind of code work properly without tests :)
<marcan> (and I still ran into a broken untested codepath at least once while doing the hv thing :p)
<marcan> (was just a typo in one of the wrappers though, not the core code)
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