ChanServ changed the topic of #dri-devel to: <ajax> nothing involved with X should ever be unable to find a bar
<alyssa> whoops just deleted 200 lines of turnip
<HdkR> That's a lean turnip right there
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<ayaka_> I want to buy a second computer as the development platform for video codec and display. I have had a amd b450 mainboard
<ayaka_> but it seems that AMD GPU only supports a video plane in a crtc?
<ayaka_> intel platform would be a better choice here?
<MrCooper> ayaka_: FWIW, drm_info lists only one overlay plane per CRTC for the iGPU in a Whiskey Lake laptop, looks more or less equivalent to an AMD GPU
<ayaka_> I only saw AMD GPU supports nv12 (no tile) in primary plane
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<ayaka_> while, intel .format = DRM_FORMAT_NV12, .num_planes = 4
<ayaka_> the intel gpu I have is Arc A380(Iris Xe), I think I could get at least two video planes in a crtc?
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<emersion> you can check drmdb
<ayaka_> I would check your page
<ayaka_> it is surprise that nvidia-drm also support video plane in overlay type of planes
<ayaka_> but "The NVIDIA DRM KMS implementation does not yet register an overlay plane: only primary and cursor planes are currently provided."
<ayaka_> maybe the intel would be the only choice unless I count those arm platforms in
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<karolherbst> jenatali: ... so the CL CTS expects empty strings for api kernel_attributes (that kernel introspection stuff)... :D
<karolherbst> ehh
<karolherbst> when using the spir-v compilation mode
<karolherbst> let me dig into the spec to see if there is something funky
<karolherbst> "For kernels not created from OpenCL C source and the clCreateProgramWithSource API call the string returned from this query will be empty." for the CL_KERNEL_ATTRIBUTES thing.. *sigh* oh well
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<karolherbst> gfxstrand: any last opinions/ideas on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161/diffs?commit_id=1fb38736db222c4b834803e47fc68cd2d765007e ? Kind of want to merge _something_ so I can move forward on radeonsi enablement
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<tomba> I have been looking at adding DisplayPort MST support to an embedded SoC, which has a display controller (4 crtcs and planes, parallel output) and a separate DP bridge. The details are still a bit fuzzy to me, but if I gather it right, with MST, the display controller driver has also to support MST, not just the DP bridge. Is that correct?
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<alyssa> mesa_shader_cache over 1GiB, yikes T_T
<alyssa> guess I should really disable shader cache for CTS runs..
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<alyssa> debian-armhf just caught some non-portable format specifiers that snuck into an MR
<alyssa> Thank you Margie :-)
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<jenatali> karolherbst: At some point I need to get back to trying to get the CL CTS to pass 100%
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<agd5f> tomba, yes, the display IP needs to support MST
<jani> mripard: ack on https://lore.kernel.org/r/20230207143337.2126678-1-jani.nikula@intel.com with the assumption you'll send a fixes pull request this week?
<jenatali> With LLVM 15 that should cut down a lot of time spent compiling trivial test kernels, and I've learned a lot about things that WARP and D3D in general did differently than other Khronos APIs
<alyssa> jenatali: relatable
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<jenatali> And we have new features now in DXIL that I can take advantage of to cut down on the amount of lowering I have to do (for some drivers, anyway)
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<mripard> jani: yep, go ahead
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<tomba> agd5f: I meant the Linux driver. At the moment the display controller driver doesn't know or care about what's outside its outputs.
<karolherbst> jenatali: yeah... what were the biggest todos?
<jenatali> Just debugging failures
<karolherbst> with zink I also got 99.5% close btw
<jenatali> We had every test case passing on at least one driver across our ecosystem, but no individual driver hit 100%
<karolherbst> heh
<jenatali> And for a layered driver Khronos wants 2 100% logs
<karolherbst> oof
<jenatali> Yeah. We hit that for GL3.3, but I haven't tried to go back and get that for GL4.1 or 4.2 either
<karolherbst> wondering how that would look like for rusticl if I pass it on real hw + one vulkan driver :D
<karolherbst> ahh yeah.. GL4.x will be pain
<jenatali> Well rusticl's not a layered driver on its own. You'd get conformance for each individual hardware that you run on - and then rusticl+zink would be considered layered
<karolherbst> right...
<karolherbst> we are generating cursed SPIR-V anyway
<karolherbst> at least I think it doesn't count if we generate spir-v with vec16 and vulkan drivers just eat it :D
<jenatali> That reminds me, have you tried LLVM's built-in SPIR-V backend instead of the translator yet?
<karolherbst> not yet
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<jenatali> I'm sitting at 99.8% for VK1.2 on our software rasterizer though, so that's cool. Getting those last passes will be... challenging
<karolherbst> yeah.. the first 90% are always the easiest ones
<jenatali> And then trying to get a second 100% pass will also be fun
<jenatali> Yeah. Been having fun spec lawyering about how texture sampler addressing works and how it's technically different between the D3D and Vulkan specs...
<karolherbst> uhhhh
<alyssa> the first 99.8% is easy
<alyssa> it's the last 99.8% that's hard
<jenatali> Yep
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<jani> imre: I think with the acks you could just apply the series https://lore.kernel.org/r/87bkm1x0dk.fsf@intel.com to drm-intel-next-fixes, and IIUC tzimmermann will send a pull request to drm-next later this week
<jani> *sorry* I meant drm-misc-next-fixes
<imre> jani, ok, thanks
<jani> at times I'd like an edit button in irc
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<jenatali> Cough Matrix cough
<alyssa> giggle
<tzimmermann> jani, imre, -fixes is for fixes. this looks like a feature
<tzimmermann> so i'd rather not take it
<tzimmermann> unless it fixes an urgent bug in drm-next
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<imre> tzimmermann: it is a fix
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<cwabbott> dschuermann_: so, I've hit a problem trying to use divergence analysis in ir3, specifically for determining whether a branch is divergent or not
<cwabbott> we have a flag for when a branch possibly reconverges, and it seems like we could use divergence analysis to help figure out where to place the flags
<cwabbott> it's mostly working, but there's one graphicsfuzz test, dEQP-VK.graphicsfuzz.call-if-while-switch that's not working
<cwabbott> the test has a loop where the induction variable is derived from something that's ultimately derived from an undef (or more precisely from an uninitialized read from an array)
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<cwabbott> I haven't analysed it yet but I assume that the initial value doesn't matter i.e. the loop trip count doesn't matter
<cwabbott> but... even if it doesn't matter, it's still different per thread and there needs to be the proper reconvergence marked etc.
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<cwabbott> but, divergence analysis just assumes it's convergent and we don't insert any reconvergence point at the end of the loop and the test fails (probably due to only some of the threads getting to the end)
<jani> tzimmermann: what imre said. it's broken in 6.1 and 6.2, let's not skip 6.3 too
<alyssa> cwabbott: out of interest, does that.. matter?
<alyssa> setting the reconvergence flag properly, I mean
<jani> tzimmermann: arguably it's better to merge via drm-misc-next-fixes during the merge window than postpone to -rc1
<alyssa> Bifrost has the same mechanism, but setting the flag when there's no reconvergence is supposed to be free in terms of cycle count (though there's maybe a power cost)
<cwabbott> not sure, but I need it for other things anyway
<alyssa> ah
<cwabbott> I need to know when branches fall through for using the qcom version of amd's sGPR's
<cwabbott> and that's intimately related to the reconvergence flag
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<tzimmermann> imre, jani, if it's broken in 6.1 already, shouldn't it go through drm-misc-fixes?
<jani> tzimmermann: this was discussed a while back in irc. in theory it should, but we're at -rc8
<jani> while back = last week
<tzimmermann> jani, well, then put it in drm-misc-next-fixes. no objections from my side
<jani> tzimmermann: thanks. imre, please go ahead
<imre> okay
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<alyssa> cwabbott: follow up question, how much do sgpr's help if you have preambles?
<alyssa> I guess some subgroup ops are helped
<cwabbott> well, that's what I was planning to find out :)
<alyssa> fair enough
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<DemiMarie> jani: then CC stable
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<vsyrjala> DemiMarie: cc:stable was never in doubt. the question was how to actually get those fixes into linus tree (and thus stable releases) in a timely fashion, without risk to 6.2 at this late stage. and the solution is to get them in during 6.3 merge window
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<javierm> vsyrjala: agreed, that what I did for a fix that recently pushed to drm-misc-next
<javierm> vsyrjala: I thought that it would be risky to push it to -fixes at this late stage in the -rc cycle
<javierm> getting into 6.3 and then letting the stable folks to cherry-pick seemed like the best option
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