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<ondracka>
So nir_lower_int_to_float will convert stuff like "vec1 32 ssa_75 = deref_array &(*ssa_49)[9] (function_temp vec4) /* &@19[9] */" into "vec1 32 ssa_74 = deref_array &(*ssa_48)[1091567616] (function_temp vec4) /* &@19[1091567616] */" which is later detected as out of bounds read and replaced by 0.
<ondracka>
So what would be the correct way how to make this work on float-only hardware (r300 driver specifically)?
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<hakzsam>
daniels: I tried to solve the venus job but it's quite difficult, for some reasons there is a LOT of timeout
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<hakzsam>
what can we do? should I disabled the job to not block this MR?
<daniels>
hakzsam: I’ve asked someone to look at it yesterday, I’ll follow that up again and check with them so they can look at it
<hakzsam>
perfect, thanks!
<daniels>
np
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<gfxstrand>
jenatali: Mind giving !21524 another look quick. I added a bug fix and UBO support.
<jenatali>
gfxstrand: Yeah will do
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<mareko>
zmike: congrats on X-Plane
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<gfxstrand>
Yeah, that's pretty neat
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<mareko>
though I might have contribute to it by not fixing radeonsi-radv interop
<zmike>
thanks :D
<zmike>
I think various Windows drivers were the main impetus, but thanks for your contribution 🫡
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<gfxstrand>
mareko: Well, that is one way to contribute. 😅
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<gfxstrand>
jenatali: I've also been contemplating a different mechanism for filtering: Just return a zero size/align struct and the pass skips that load/store.
<gfxstrand>
jenatali: Probably more versatile than modes.
<gfxstrand>
The other thing is that the pass right now assumes your back-end uses it for everything. It takes bytes rather than a (bit_size, num_components) pair as the input to the callback. It doesn't distinguish between, say, a u8vec4 and a uint if they're both 4B aligned. That's fine for all the HW I'm familiar with, though.
<gfxstrand>
Maybe not the most friendly for API translation but fine for HW.