<alyssa>
The problem is that we don't have access to the cull distance varying at each vertex, we only have it at the provoking vertex (if flat) or we have the interpolation of them (if smooth)
<alyssa>
Maybe interpolation is ok? Like, if the interpolated value is negative, that implies all 3 distances are negative so we discard, right?
<alyssa>
True, but..
<alyssa>
the converse fails
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<alyssa>
er
<alyssa>
no that's the thing that fails
<alyssa>
The converse is true, that's false
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<alyssa>
If the distances are (-1, -1, 1) then any pixel along the edge between -1 and -1 will have an interpolated value of -1 regardless of how positive the 1 is
<alyssa>
So we're out of luck.... or are we?
<alyssa>
Recall how varying interpolation works mathemtically, it's something of the form
<tarceri>
gfxstrand: sure no problem. I'm just about to push the changes you suggested. Thanks!
<alyssa>
now, if that interpolation happens with IEEE 754 arithmetic, a very interesting property emerges
<alyssa>
if *any* vertex's value is NaN, then the interpolated value *everywhere on the primitive* is NaN
<alyssa>
even if we have (0, 0, NaN), the values along the shared 0/0 edge will *still* be NaN because NaN * 0 = NaN and NaN + 0 = NaN and the NaN poisons the whole primitive
<alyssa>
but that's exactly what we needed!
<alyssa>
With that property, we now have a way to check for any pixel whether a boolean condition is true for any vertex
<alyssa>
or by De Morgan's, whether a boolean condition is true for all vertices
<alyssa>
So here's what we're gonna do
<alyssa>
In the vertex shader, `gl_CullDistance = dist` is going to become instead `lowered_value = (dist >= 0.0) ? NaN : 0.0`
<alyssa>
with `out highp float lowered_value`
<alyssa>
then in the fragment shader, we're going to insert a prolog
<alyssa>
`if (lowered_value == 0.0) discard;`
<alyssa>
To check that this works: if all cull distances are negative, then all lowered values will be 0.0 so every pixel in the primitive will interpolate 0.0 so every pixel will in the primitive will be discarded
<alyssa>
otherwise, some lowered value will be NaN so every pixel in the primitive will interpolate NaN so no pixel will be discard
<alyssa>
One wrinkle... at least on the M1, varying interpolation *doesn't* happen with IEEE 754 arithmetic
<gfxstrand>
I wonder if you could short-cut the discard bit and just do if (gl_cullDist < 0) gl_FragCoord.x = NaN
<gfxstrand>
Or .w or something
<alyssa>
in the VS or the FS?
<gfxstrand>
in the VS
<alyssa>
no, that won't work
<gfxstrand>
And hope the clipper freaks and tosses the whole thing
<alyssa>
because it's an AND not an OR
<gfxstrand>
Oh
<gfxstrand>
Well that's dumb
<gfxstrand>
But ok
<alyssa>
if you're drawing triangle strips or something, you can have a vertex whose negative value contributes to culling in one primitive but not the other
<gfxstrand>
sure
<gfxstrand>
Makes sense, I guess
<alyssa>
so no pure VS lowering is possible unless you unroll everything
<gfxstrand>
:(
<alyssa>
03:19 < gfxstrand> And hope the clipper freaks
<alyssa>
it's too busy freaking from when I ran t-rex this morning
<gfxstrand>
Yeah, TRex is mean to clippers
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<alyssa>
there are some annoying details about making that scheme work with separate shaders
<alyssa>
(for GL it doesn't matter. for Vulkan monolithic it doesn't either. Might screw over GPL fast link.)
<gfxstrand>
Eh, it can be made to work, I think.
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<gfxstrand>
Just need to push a mask into the shader or something
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<alyssa>
more thinking about how to link the internal extra varyings
<alyssa>
definitely can be made to work, just unsure whether it would slow down everything separable to be conservative about it
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<alyssa>
meanwhile on gl_ClipDistance
<alyssa>
I need nir_lower_clip_disable, but that is in itself an early pass that I need to do a late version of for this
<alyssa>
....and I have decent evidence that AGX can't interpolate gl_ClipDistance so the varyings need to be duplicated anyway
<alyssa>
so maybe I want to punt on this and figure out if I can make lower_clip_fs happen late and revisit this come Vulkan
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<RAOF>
Hm. Would anyone object to me making it possible to add drirc.d directories from an environment variable?
<RAOF>
It would be convenient, and it looks like it might allow removing some cludges added to support tests?
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<mupuf>
RAOF: no objections from me, provided we find a way to make it unsurprising. Were you thinking about purely adding, or overriding the default one?
<RAOF>
🤷♀️
<RAOF>
Purely adding would be sufficient for my purpose, but if replacing was preferred I could certainly do that.
<mupuf>
I would go for whichever would be least surprising... which may be the override one or may not
<mupuf>
were you planning on a coma-separated list of directories?
<RAOF>
Following the vulkan loader, something like a colon-delimited MESA_ADD_DRIRC_PATH would be my first thought.
<mupuf>
well, at least, it wouldn't be surprising :)
<RAOF>
I guess the most surprising behaviour would be how combining multiple settings would be handled.
<RAOF>
Although that's not a novel problem, since drirc.d already aggregates multiple configs.
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<X512>
Is it possible to link libnir as shared library?
<tomeu>
X512: it could be possible, but if you can extend on your use case, maybe somebody can give some opinions on whether that would be a good idea
<X512>
It looks wasteful to duplicate libnir to each driver.
<tomeu>
ah, drivers should be all together in a single .so
<tomeu>
so no waste
<X512>
Not for Gallium and Vulkan drivers.
<lynxeye>
X512: not sure about vulkan, but gallium drivers are megadrivers, where all the drivers are linked into a single .so and the different names are just hardlinks
<danvet>
mairacanal, for the rust bindings also chat with lina
<danvet>
even right lina, yay
<X512>
Rust bindings for internal Mesa API (Gallium etc.)?
<X512>
Internal API seems often change.
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<MrCooper>
lynxeye: I think X512's point was that libnir is still duplicated between the Gallium mega-driver and Vulkan drivers at least
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<melissawen>
Is there any dependency between degamma and ctm atomic color properties on the DRM side? I mean, if the driver doesn't advertise degamma, it can still advertise CTM and gamma properties independently, right?
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<mairacanal>
danvet, I was checking lina 's DRM bindings which are looking pretty neat btw, but I currently I'm thinking mostly on the dma-buf bindings as they are a crucial part of vgem
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<emersion>
melissawen: AFAIK yes
<emersion>
would be the same as DEGAMMA = null (zero object ID)
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<melissawen>
emersion, thanks for confirming. I've also double-checked with drm_info that the property keeps there, so I suspect there is a dependency between these properties in the userspace case.
<emersion>
you mean some user-space expects these two to be supported together, or not at all?
<emersion>
sounds like a user-space bug indeed
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<melissawen>
yeah, I suspect the userspace expects degamma support to advertise CTM, since I don't find any dependency on the kernel side.
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<alyssa>
off by one in user-clip-all-planes hmm
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<alyssa>
maybe buggy test, it's failing on a lot of drivers
<alyssa>
including radeonsi, the reference driver :p
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<alyssa>
freedreno-a420-fails.txt says
<alyssa>
# The clipped polygon is off-by-one pixel from the directly drawn one
<alyssa>
wonder if it's a test bug with float math or something, idk
<jenatali>
I think we pass it
<alyssa>
yeah, it passes with hw clip distance interpolation, just not nir_lower_clip_fs
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<danvet>
mairacanal, I also wonder whether we should look into the drm_exec stuff that's floating around
<danvet>
otoh vgem doesn't really need that
<danvet>
for dma-buf bindings there's also the question of whether we need ww_mutex bindings first, or just wrap that all as a dma-buf implementation detail
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<mairacanal>
danvet, afaik we need the ww_mutex bindings first to make the safe abstraction for dma-buf, just like semaphores, rw_semaphore and other sync objects
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<danvet>
mairacanal, btw are you in the rust-for-linux zulip, or need an invite?
<danvet>
I quickly discussed the ww_mutex binding stuff with the rust folks this week, if you want I think would be good if you also join
<danvet>
there's also some sync meeting on gpu rust upstreaming in 2 weeks again
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<mairacanal>
danvet, yeah, I'm in zulip, I will try to take a look at the ww_mutex discussion. do you remember in which stream happened this discussion?
<DemiMarie>
Any plans to deal with the "sleeping in atomic context causes UaF" unsoundness?
<DemiMarie>
alyssa: mind if I DM you?
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<alyssa>
DemiMarie: about?
<alyssa>
also, do I know you?
<alyssa>
irc logs indicate yes
<DemiMarie>
GuC stuff
<alyssa>
I don't work on that hardware
<alyssa>
try #intel-gfx
<danvet>
DemiMarie, what's that atomic uaf unsoundness thing?
<DemiMarie>
We’ve talked about graphics stuff before
<danvet>
also no idea what uaf means and urban dict is decidely less useful
<airlied>
use after free
<danvet>
ah
<danvet>
I guess I'm very firmly in w/e mode
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<alyssa>
DemiMarie: anyway, I don't know anything about GuC except what's been discussed in here, and I don't work on Intel hardware or (usually) the kernel at all, so I don't think I have much to say, sorry! :)
* alyssa
is glad she's not touching that :-p
<alyssa>
---
<alyssa>
I added some milestones for tracking MR's through the review/merge process
<alyssa>
and tagged my own MR's
<zmike>
is one of them Sisyphus
<alyssa>
I'm not sure how well this is going to work but I figure it's a very low cost thing to try, and I've seen it for a few other projects I think
<DemiMarie>
danvet: I believe that on CONFIG_PREEMPT=n, scheduling in a RCU read-side critical section will cause the critical section to end too soon.
<alyssa>
and it makes it really easy for reviewers to check what they have to review
<DemiMarie>
alyssa: I meant the “I don’t and you shouldn't” about the GuC firmware.
<alyssa>
Hmm?
<HdkR>
alyssa: Nice!
<DemiMarie>
alyssa: regarding the security of that firmware against malicious inputs
<alyssa>
oh
<alyssa>
right. again I don't know anything, I'm just a loud rando :-p
<HdkR>
Big same
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<alyssa>
airlied: anholt: what's the rules for landing draft UAPIs into Mesa (behind a build flag), subject to change and before they've landed in stable form in mainline?
<alyssa>
I thought that was a huge no-no (and have been suffering through the rebases as a consequence) but danvet said I should ping you two about it
<danvet>
probably needs something really scary like do-not-enable-unless-you-are-hacking-on-axg-drivers
<alyssa>
i'm good with scary if it means an end to rebase fail
<danvet>
but I think we've done that a few times in different places now
<alyssa>
s/fail/pain
<airlied>
i think we did it for vc4, i worry a bit with asahi though
<airlied>
since there seems to be a bit of distro competition around apple hw
<airlied>
if a distro is going to turnthe flag on, then i dont want it in mesa
<airlied>
because when the mainline diverges, we will end up owning a can of worms, and Linus
<alyssa>
airlied: Yeah, that's very fair
<alyssa>
manjaro definitely would flip the flag...
<anarsoul>
but does Linus run Manjaro? :)
<alyssa>
;p
<airlied>
and their users will cry loudly if a new kernel breaks their desktop
<alyssa>
unfortunately Linus does run Asahi Linux ....
<anarsoul>
alyssa: why not to add ioctl to query uapi version?
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<airlied>
why not create a stable api :-p
<anarsoul>
airlied: for an REd driver?
<airlied>
at some point you have to trust you understand enough to build on
<danvet>
aren't the non-re'ed driver uapi's in the minority?
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<gawin>
airlied: iirc crocus is doing internally fallback for d16, maybe it would be better to not advertise d16 at all? (gallium nine fails into weird codepath, and Axel suggested avoiding it if possible)
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<gawin>
I mean d16 as real d16, but overridden later
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