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<mripard> sima: following up on here and mastodon, I guess I'll just drop the patch
<mripard> it's still an implicit panic, which is inconsistent over similar calls, but that's really not the point of the series
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<javierm> mripard: I still don't understand why the check is controversial... is not that drm_connector_init() is in a hot path
<javierm> but yeah, not the point of the series so you could drop it if that would help focusing on the actual changes rather than bikeshedding how paranoid helpers functions should be
<pq> Pre-conditions vs. legit argument values.
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<emersion> normal runtime errors vs. programmer mistakes
<javierm> pq, emersion: the problem is that C doesn't have a way to check that
<emersion> a way to check what?
<javierm> so whether pre-conditions / programmer mistakes or not, it will lead to a panic
<emersion> no matter how complicated the type system may be, there will always be cases where the type system won't be enough
<pq> C does have assert(), and the kernel has BUG() and friend.
<emersion> there will always be cases where a panic/abort is the only way to indicate a programmer mistake
<emersion> maybe my function has two arguments, and one can only be supplied when the other not, etc
<emersion> or a string needs to have a specific format
<emersion> or a number greater/smaller than 42
<emersion> Rust cannot encode these things
<emersion> (and IMHO trying to encode complicated constraints in type systems results in developers writing types, instead of writing actual useful code :P )
<javierm> emersion: no, but we are talking about preventing a NULL pointer dereference here
<pq> It's also a question of definition: who is required to validate the arguments or pre-conditions. The one who does not bear that responsibility can explode when pre-conditions are broken.
<emersion> javierm: to me, they're the same kinds of errors: programmer mistake
<pq> javierm, yes, we are talking about exactly that.
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<javierm> emersion, pq: Ok. So is more controversial than I thought then
<pq> If the pre-condition is that this function must be called with a non-NULL argument, and someone calls it with NULL, then it should explode. But if that pre-condition does not exist, then the function may as well return a graceful error if it cannot work.
<emersion> my take is that it's a good thing to panic/WARN/abort on programmer error
<emersion> way easier to spot the mistake and debug
<javierm> pq, emersion: my take is that core kernel code should be paranoid and try very hard to not lead to a panic
<pq> Indeed, unexpected failures should explode hard and on the spot (in debug builds).
<emersion> a panic isn't such a big deal
<emersion> sorry, i mean a WARN
<emersion> it's not like it takes down the whole kernel or anything
<pq> javierm, that's true depending on what we're talking about. If arguments come from userspace, then totally yeah.
<emersion> invalid args coming from user-space isn't a kernel programming mistake
<mripard> emersion: Rust can do that if you use the newtype pattern
<javierm> emersion: it could with CONFIG_PANIC_ON_OOPS=y but yeah, probably not enabled in production builds
<mripard> but back to the topic
<emersion> mripard: do what?
<mripard> all of that discussion about panic vs error check is also missing an important point
<emersion> ah, use a newtype to enforce that the arg has a given property?
<mripard> a) we never document that *anywhere* b) it's implicit c) it's not consistent across similar calls
<emersion> that makes it the caller's responsibility to check, which may not be better
<mripard> and that cannot be explained by "well panic is just better"
<mripard> those three things are bad, no matter which side of the fence you're on
<javierm> mripard: agreed
<emersion> documenting pre-conditions is indeed important
<pq> indeed, and if you have a if (!arg) return -EFAIL;, then it documents that there is no pre-condition saying arg must not be NULL, because NULL is gracefully handled.
<mripard> so I'm sending a separate series adding a bunch of BUG_ON, improving the documentation and making that consistent across calls
<pq> so you're making the policy by adding the check
<mripard> would that satisfy everyone?
<emersion> i think that's the right thing to do
<pq> mripard, that sounds awesome to me.
<mripard> s/so I'm sending/if I'm sending/
<mripard> great
<mripard> I'll do that then :)
<mripard> topic closed, can we move to the rest of the series ? :)
<pq> essentially the debate is about wether "arg is not NULL" is a pre-condition or not.
<pq> If you add BUG_ON(!foo), that documents it's a pre-condition.
<pq> If you add if (!foo) return -EINVAL; that documents it is not a pre-condition.
<emersion> yea
<pq> For a casual code reader, not having a pre-condition documented means that the opposite is probably normal operation and needs to be handled as well as possible, which might prompt them to write a lot of code to deal with it. Sometimes that's good, sometimes bad, depending.
<pq> Simply dereferencing a pointer can be seen as a pre-condition "is not NULL'ish", because NULL pointer dereference is expected to crash immediately. Problem are cases where it does not crash, or somehow allows a compiler to generate nonsense code.
<javierm> just wanted to mention that the BUG_ON() kernel-doc says that should be used only as a last resort and if there's really no way out
<javierm> I understand your point from a theoretical PoV but in practice I believe that can cause a lot of harm to not be paranoid about check if the pre-conditions are meet
<pq> depends on the probabilities
<javierm> regardless I agree with mripard that making the pre-condition explicit with a BUG_ON() rather than implicit is progress
<pq> Pre-conditions should definitely be checked at least in debug builds / CI for sure. What to do when it fails is another question. But this is also orthogonal to defining or not defining something as a pre-condition.
<mripard> could we just stop discussion a one-liner and focus on the rest of the series that actually provide some notable features?
<pq> and whether something is a pre-condition or not is totally arbitrary
<mripard> pleaaaase :)
<pq> sorry, philosophy is much more interesting than work :-p
<javierm> pq :D
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<sima> mripard, I think you get the crown for "caused the best bikeshed of the year"
<mripard> if that means it's an automatic ack for the rest of the series, then I'm glad I did :-D
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<karolherbst> gfxstrand: we have a bug in regards to alligned attributes in vtn: https://gist.github.com/karolherbst/f62d2c874e3d9cd6d839c68bbd9fdf9b
<karolherbst> "64 %64 = deref_cast (uvec2 *)%63 (shared uvec2) (ptr_stride=0, align_mul=1, align_offset=0) #!!! alignment is wrong"
<karolherbst> so the shared memory is forced to be aligned, but then we drop it back to 1...
<karolherbst> but I guess we might just not honor the alignment information in vtn there?
<karolherbst> maybe I should check if the spir-v is even fine...
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<karolherbst> yeah.. the spirv has the alignment.. let's see...
<karolherbst> ohh.. it applies Alignment to the variable, not the pointer type...
<karolherbst> guess we could work around that.. *sigh*
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<gfxstrand> Oh...
<gfxstrand> What do you mean?
<karolherbst> gfxstrand: like the spirv-llvm-translators puts `Alignment` on the `OpVariable` not on its pointer type
<karolherbst> should have been `OpDecorate %_ptr_Workgroup__arr_uchar_ulong_1024 Alignment 8` instead I think
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<gfxstrand> Weird
<gfxstrand> I thought we handled that.
<karolherbst> well.. doesn't look like it
<karolherbst> well.. it's also invalid to put it on the variable
<karolherbst> "Apply only to a pointer. Alignment is an unsigned 32-bit integer declaring a known minimum alignment the pointer has."
<wv> are there known issues regarding colors on freedreno/dmabuf? It appears that when I use glimagesink or appsink using dmabufs, I have color issues. Or video is green, or there's like a shift of 180 pixels in colors (like a mask is played next to the grey image)
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<gfxstrand> karolherbst: Well, an OpVariable is a pointer...
<gfxstrand> karolherbst: Or is it a variable that contains a pointer?
<gfxstrand> I honestly don't know what we're supposed to do with an alignment on a variable.
<karolherbst> the variable is just an array
<gfxstrand> ugh...
<karolherbst> in OpenCL C: __local uchar data[512/4*sizeof(ALIGN_TYPE)] __attribute__((aligned(sizeof(ALIGN_TYPE))));
<gfxstrand> Right
<gfxstrand> Yeah, we don't handle that sort of alignment yet.
<karolherbst> mhh.. we'd also have to place the variable aligned I guess...
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<karolherbst> yeah.. it kinda makes sense to be able to align the type actually...
<karolherbst> the variable I mean
<gfxstrand> And... The spec says nothing. Because of course it does.
<gfxstrand> Let me type something quick.
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<karolherbst> gfxstrand: where does the spec state that a variable is a pointer actually?
<gfxstrand> OpVariable returns a pointer
<gfxstrand> Just look at the OpVariable spec
<karolherbst> ohhh...
<gfxstrand> But, as with most SPIR-V things, it's legal to write it but no spec actually says what it means so we kinda have to make it up.
<karolherbst> let's see...
<karolherbst> "The compiler is responsible for aligning objects allocated by OpVariable to the appropriate alignment as required by the Result Type."
<karolherbst> I guess that's everything we get here
<gfxstrand> Yeah, but what does that mean?!?
<karolherbst> well.. if the result type would be decorated with "alignment"
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<karolherbst> but I think this just means we have to align per CL rules (type alignment) or according to the alignment attribute (Alignment decoration)
<gfxstrand> Yeah, but alignment is a hint, not a command.
<gfxstrand> At least on all other pointer types
<karolherbst> I don't think it's a hint in CL
<gfxstrand> In any other environment it is.
<karolherbst> like if you align a shared memory block you can hope that it's indeed aligned that way
<karolherbst> or if you align struct members
<gfxstrand> Well, it's a hint in the sense that if the client sets an alignment then it's up to the client to make sure it's true.
<karolherbst> yeah
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<gfxstrand> But I mean that it's data provided to the compiler. The compiler is free to ignore it.
<karolherbst> but the client also expects this alignment to be honored by thec ompiler
<karolherbst> mhhh
<karolherbst> I don't think it is
<karolherbst> not in CL
<gfxstrand> Sure you can. You can use unaligned loads for everything. There's nothing stopping you.
<karolherbst> like again, if you annotate a shared memory block with "this is aligned with 8 bytes" then you kinda want that block to be 8 byte aligned
<karolherbst> well...
<karolherbst> right
<karolherbst> but...
<karolherbst> the thing is
<karolherbst> what if you cast that array to an array of longs
<karolherbst> and then use load/stores on it in functions
<karolherbst> you can't assume everywhere that things are unaligned if you care about perf
<karolherbst> but yes.. you can just ignore it and do unaligned load/stores everywhere :)
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<karolherbst> cool thanks, will try it out later
<gfxstrand> I've compile tested and I think it ought to do the trick but I've not tried out your CL test case.
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<jenatali> karolherbst: Seems like the problem is in the SPIR-V, no?
<jenatali> %84 = OpBitcast %_ptr_Workgroup_v2uint %arrayidx6
<jenatali> OpStore %84 %81 Aligned 1
<karolherbst> yeah.. sounds like there is also a bug in the translator/llvm then
<karolherbst> we need to honor the alignmend on the variable for placement inside the shared memory region anyway
<jenatali> If you look at the LLVM IR I'm pretty sure you'll see the 1-byte alignment come in there too
<jenatali> Right, I agree, there's still something that should be fixed here, but I don't think that's the cause of your unaligned loads/stores
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<karolherbst> yeah..
* jenatali fought a lot with alignment since DXIL has no 1-byte aligned load/store capabilities...
<karolherbst> I still have a cast to align_mul=1 sadly :)
<karolherbst> yeah..
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<karolherbst> zink might also want to align variables...
<karolherbst> but I'm sure it's fine ...
<karolherbst> jenatali: we should add a CLC_DEBUG=dump_llvm option... :D
<jenatali> Yeah, sure
<karolherbst> let me add one actually..
<karolherbst> and now I know why I haven't already
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<karolherbst> jenatali: you are right.. "store <2 x i32> %6, <2 x i32> addrspace(3)* %9, align 1" pain
<jenatali> Yep
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<karolherbst> ehh...
<karolherbst> I wanted to move the function
<DavidHeidelberg> karolherbst: where is the docs for it? :P
<karolherbst> there is
<karolherbst> uhm.. for what anyway?
<karolherbst> anyway.. done with the MR update
<DavidHeidelberg> karolherbst: weird, I see it with changes on top of both commits, but didn't show up when browsing one-by-one
<DavidHeidelberg> so good :)
<karolherbst> yeah.. gitlab also screwed up for me a few minutes ago
<kisak> milestone, 20k merge requests merged into mesa since migrating to gitlab.
<karolherbst> I hope it was mine
<karolherbst> ohh.. it was already a while ago
<hch12907> karolherbst: for a moment I thought it was "dump" in the "to throw away" sense
<karolherbst> not yet
<hch12907> I was like, are we adding a C parser to mesa now?
<hch12907> šŸ˜„
<karolherbst> like
<karolherbst> if that's the fun you are looking for, sure
<kisak> oh, I got the milestone wrong ... 20k merge requests merged by Marge Bot just now
<karolherbst> ahh
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<jenatali> karolherbst: Yeah zink's callback is very wrong
<karolherbst> figures
<jenatali> It's saying that it requires component-aligned accesses, which defeats the whole purpose of the pass
<jenatali> Which is to change the component size
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<karolherbst> right
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<karolherbst> so if it sees a 32 bit load with an alignment of 1, it should return 8x4 instead I guess
<jenatali> Right
<jenatali> Unless it can actually do a 32bit load with an alignment of 1, in which case it can return 32x1, it just needs to set the out alignment to 1
<karolherbst> but will the pass use atomics for that already (if allowed)?
<karolherbst> I think vulkan spir-v requires type size aligned load/stores for everything, no?
<jenatali> Probably
<karolherbst> yeah.. the main intention of adding that pass/code was to deal with vec8/vec16
<karolherbst> but I'll have to figure out the unaligned bits as well
<jenatali> The pass will do atomics for stores where the returned alignment is greater than the input alignment, yeah
<karolherbst> mhhh
<jenatali> I.e. if the input alignment is 1, but the driver can only do 2- or 4-byte-aligned stores, then the pass will promote the store to atomics with 4-byte alignment
<karolherbst> okay, so zink should just enable that atomic option and it should be good?
<jenatali> It already is setting that flag, which just guards an assert. It needs to return correct data from the callback
<karolherbst> well.. I guess for private memory it shouldn't rely on that option
<jenatali> karolherbst: You might want to reference what I have here: https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/microsoft/compiler/nir_to_dxil.c#L6184
<karolherbst> jenatali: but how would that then work.. if you e.g. have a 32 unaligned store, but you don't want to split that up into 8x4 because it would violate API rules
<jenatali> It has to get split up into 4 8x1 stores
<karolherbst> okay, so the pass won't do that automatically, but it will use atomics for it?
<jenatali> The callback has to return that you want 8x1 with 4-byte alignment, and then the pass will turn that into atomics, yeah
<karolherbst> 8x1 or 8x4?
<jenatali> Well, if you can do 8x4 with 1-byte alignment, then you can just return that. Zink can do that with the 8bit load/store extension
<jenatali> If that extension isn't present, then zink needs to return a higher alignment, and in that case you'd want to do 1 byte at a time I think
<karolherbst> I tihnk the problem is that a vulkan compiler would be free to split those stores
<jenatali> Sure, then the vulkan compiler can do that
<karolherbst> but wouldn't that be illegal from a CL perspective?
<jenatali> Why?
<karolherbst> mhhh, not quite sure actually...
<jenatali> The only requirement is that the writes don't modify other data, and that they don't race with other writes to nearby data
<karolherbst> ohh right..
<jenatali> If the vulkan driver (or zink) splits an unaligned store into 4x byte stores, that's fine as long as each store actually only writes the relevant byte
<karolherbst> like if you do a 64x4 write but the pointer is aligned with 2
<karolherbst> wait.. bad example
<karolherbst> 32x2 but aligned with +0x3 and you want to use a 32x3 write for the whole area, but the edges need to update in a way it doesn't interfer with anything
<jenatali> Then if you can do 2-byte-aligned stores, you'd return that, otherwise 4. If you return 4, you'll need to write one 2-byte chunk at a time via atomics. If you return 2, then you can return 16x4 and the pass will chunk it up appropriately
<karolherbst> right...
<karolherbst> yeah, makes sense
<jenatali> 32x2 with +0x3 offset, you'd use a 1-byte store for the first bit, then the pass would call you back again with a 4-byte-aligned store
<jenatali> It's really quite a clever pass as long as the callback returns good data. Took me a while / a few tries to get the callback right for our limitations though
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<DemiMarie> @_oftc_CADIndie:matrix.org: could you push Qualcomm to do what Intel and AMD do and have launch-day upstreamed drivers?
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<gfxstrand> That would require Qualcomm to actually contribute to the upstream drivers.
<gfxstrand> Or any open-source upstream for that matter.
<DemiMarie> They absolutely should
<DemiMarie> Google should just ban out of tree drivers from Android
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<DemiMarie> Make people upstream their drivers or no Google Play Services
<DemiMarie> Heck, I suspect that Android is a bigger market for Qualcomm than desktop Linux is for Intel.
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<pac85> Demi: that would ruin the fun for those that do the reverse engineering
<DavidHeidelberg> DemiMarie: Google should ban proprietary rootkit (GMS) which runs on 99% of Androids :) but it's not going to happen
<karolherbst> jenatali: yeah.. I kinda wished this pass would have proper documentation on the callback :)
<jenatali> karolherbst: Be the change you want to see in the world :P
<karolherbst> I'm already am, hence me not having time to also document code anymore šŸ™ƒ
<karolherbst> oh hey, now I even have a good excuse for real
<robclark> DemiMarie: qcom did actually have patches on list for sm8650 and sc8380xp basically the day they were announced.. I don't believe either are shipping yet
<robclark> (also no idea who you were replying to, I guess yet another matrix ghost)
<pac85> Including GPU driver patches?
<robclark> I don't think they have posted kernel parts yet, but I expect they will before those devices ship
<robclark> (which is sometime next year for sc8380 ... not sure about the mobile part, but tbh the laptop part is more interesting)
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<pac85> whoops
<gfxstrand> DemiMarie: Oh, if only it were that simple...
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<mattst88> magical thinking
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<DemiMarie> mattst88 gfxstrand robclark DavidHeidelberg: Iā€™m still very much an idealist.
<robclark> the situation has improved somewhat dramatically from 5 or so years ago, now we are getting SoC support the day it was announced rather than a few years after it shipped.. qcom contributing to the UMD is still a bit of a red line for them, but they do contribute to KMD
<mattst88> DemiMarie: that's great, but you're kind of doing it again...
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