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<mani_s> CosmicPenguin, In upstream kernel if we have the "msi" interrupt specified in dts, then it will use the internal MSI controller
<mani_s> In downstream they don't use it at all
<mani_s> you are using upstream kernel + dts, right?
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<CosmicPenguin> mani_s: yes. What I'm confused about is how we tell the DWC hardware that we want to us the internal controller (or alternatively, how does Qualcomm tell it they want to use an external controller?)
<mani_s> CosmicPenguin, DWC core in drivers/pci/controller/designware/pcie-designware*.c takes care of that
<mani_s> as I said, if you pass "msi" interrupt property in dt, then it will try to use the internal one
<mani_s> otherwise you need to use the "msi-map" property to link the external MSI controller
<mani_s> in dt
<mani_s> CosmicPenguin, upstream rb5 uses the internal controller
<CosmicPenguin> mani_s: here's something interesting. You are right that rb5 works on pcie0 for the wifi - in the DTS, the "msi" interrupt is 141
<CosmicPenguin> mani_s: and on downstream, the pcie0 node doesn't know about 141 - it has 140 for the "global" and then 149-152 for the int_a to int_d
<CosmicPenguin> mani_s: but, for pcie1 and pcie2, the "msi" interrupt number is the same one that downstream has for "global". Since the MSI interrupt is different on pcie0 I assume it should be for pcie1 and 2 as well
<CosmicPenguin> should be different, that is
<CosmicPenguin> I tried just blindly adding 1 to them but that didn't work
<mani_s> CosmicPenguin, Ah, I think it is a problem
<mani_s> we've only tested pcie0
<mani_s> I think lumag reported this before as well
<mani_s> Let me check w/ qcom on correct MSI IRQ for pcie1 and pcie2
<CosmicPenguin> mani_s: totally understandable. Thanks for the suggestion to look. :)
<CosmicPenguin> bamse: any chance we could get a pointer to the right HW irq numbers?
<CosmicPenguin> or mani_s can do it too
<bamse> CosmicPenguin: remind me, which platform was this?
<CosmicPenguin> Thundercomm eb5
<mani_s> CosmicPenguin, found it
<mani_s> CosmicPenguin, pcie1 - 307
<mani_s> pcie2 - 243
<mani_s> can you test it?
<CosmicPenguin> yes. It should still be IRQ_TYPE_EDGE_RISING ?
<bamse> mani_s: wouldn't that be 306 and 236, respectively?
<mani_s> CosmicPenguin, Should be LEVEL_HIGH
<mani_s> bamse, no. 306 and 236 are global_interrupts
<mani_s> we don't use it on upstream driver
<bamse> that's what i use... ;)
<mani_s> bamse, how did it supposed to work ;)
<mani_s> bamse, did you had anything connected on pcie1/2?
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<mani_s> bamse, global_interrupt is for receiving link specific events and since we don't support those kind of advanced usecases yet in upstream. It is unused
<mani_s> once CosmicPenguin confirms, I'll send a patch
<bamse> mani_s: on sc8180x i use only the global irqs...because that was the one that worked...
<bamse> sounds like i need to revise that
<mani_s> bamse, yes you should
<mani_s> because that's a wrong one for sure
<mani_s> time to sleep... have a good day folks
<bamse> mani_s: good night :)
<CosmicPenguin> mani_s: woo! That was it 307 and LEVEL_HIGH confirmed for pcie1
<CosmicPenguin> mani_s: I can patch it or you can if you want
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