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<mgonzalez> mripard, lumag, narmstrong: thank you for reviewing and merging the devm patch for simple-bridge
<mgonzalez> I have a question about drivers/gpu/drm/bridge/cros-ec-anx7688.c
<mgonzalez> It doesn't define an .enable or .atomic_enable callback. Does that mean it is not up to date with the API?
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<lumag> mgonzalez, no it just means that it doesn't need anything on enable
<lumag> Just like drm-aux-bridge / drm-aux-hpd-bridge
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<mgonzalez> The HW block implementing a function (ethernet, USB, SATA, etc) is usually split between a PHY block for pure bit transmission, and another IP block. What do we call that second IP block? MAC? Is that only in Ethernet context?
<konradybcio> only in the ethernet context
<mgonzalez> What would you call the not-PHY in other contexts? :)
<konradybcio> for example the "brain part" of PCIe is called the RC (root complex), or with DP it's.. the DP controller
<konradybcio> usually it's some sort of "x host" or "x controller"
<mgonzalez> OK and for HDMI and SATA?
<konradybcio> controller probably works for both, although i've never given much thought to sata
<mgonzalez> controller OK, or maybe protocol block?
<mgonzalez> (a bit overly generic perhaps)
<konradybcio> yeah, protocol block sounds a bit like "chatgpt i need a scientific paper in my name" ;)
<mgonzalez> hehe, thanks
<Tooniis[m]> <konradybcio> "usually it's some sort of "x..." <- or both as in usb
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