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<tuxd3v> in sunxi-h3-h5.dtsi, pwm is configured as "PL10", but h3 has pwm coming out of "PA6"..
<tuxd3v> usually devices are created in /dev, yes they are diferent subjects :)
<tuxd3v> for pwn I bellive the defconfig option is 'CONFIG_PWM_SUN4I'
<wens> tuxd3v: SPI busses aren't available to userspace in /dev
<wens> tuxd3v: check /sys/bus/ ?
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<tuxd3v> I have '/sys/class/spi_master/spi0'
<tuxd3v> wens, thanks..
<tuxd3v> the thing I am checking is pin compatibility from my board with sunxi-h3-h5.dtsi
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<wens> sunxi-h3-h5.dtsi is soc level, not board level dtsi
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<wens> there are two pwm controllers
<wens> the pin for the normal pwm controller, PA6, is not listed in the dtsi file
<wens> you can add it
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<wens> anyway, if your board has h2/h3/h5, then it is going to include sunxi-h3-h5.dtsi from the h3 or h5 dtsi
<wens> h2 is just a lower binned h3 AFAIK
<wens> so we don't have a separate dtsi file for it
<tuxd3v> yeah but its there were i2c,spi,pwm are defined :)
<tuxd3v> and I notice that pwm is defined as PL10
<wens> PL10 is "r_pwm" which is not the same as normal pwm
<tuxd3v> ho..
<wens> r_* or s_* are IP blocks in the RTC power domain that are available to the onboard MCU
<wens> notice they are in a different address region, and use a separate pin controller?
<tuxd3v> indeed
<tuxd3v> true
<tuxd3v> but where is so pwm defined pins?
<wens> I think whomever that added the pwm might have forgotten to add the pin
<wens> you get to add the definition yourself? :)
<tuxd3v> it has a register address: 0x01c21400
<tuxd3v> I don't know if its pwm0, or pwm1 or else
<tuxd3v> only the datahseet knows :)
<tuxd3v> datasheet*
<tuxd3v> acording with h3 datasheet it would be pwm0
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<tuxd3v> but pwm0 is mapped to PA5
<tuxd3v> I see that pwm1 can be PA6, but I find nothing in H3 datasheet about that..
<wens> sometimes it's that the pwm controller has multiple channels
<wens> (which is probably why the pin defs weren't added)
<tuxd3v> so pwm0 would be pwm chanel0 ?
<tuxd3v> pwm1 , pwm chanel 1?
<tuxd3v> it could be
<tuxd3v> but the h3 datasheet refers only to pwm chanel 0
<tuxd3v> and the dts base address reg = <0x01c21400 0x8>; is correct..
<tuxd3v> but them they refer pwm0 as PA5 pin
<tuxd3v> I am using pwm1 in PA6 pin :D
<tuxd3v> alright the biggest datasheet( the older one ), has pwm1 documented :)
<tuxd3v> PA5 -pwm0, PA6 pwm1
<tuxd3v> but they are function3, its not the default..
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<tuxd3v> wens, how could I enable chanel 1 or pwm?
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<tuxd3v> wens, reg = <0x01c21400 0x8>; means base address plus 8 bytes right?
<hanetzer> think its base and size.
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<wens> pwm1 is probably an error in the docs :/
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<gediz> smaeul: it's great if there's a patch for this. thank you.
<gediz> megi: nope. i use LCD. iirc A13 does not have HDMI.
<gediz> i feel like sun8i_dw_hdmi.c patch is not necessary, "sram consumer & supplier from DT" patch would probably be sufficient for A13 but i will try it. much appreciated.
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<tuxd3v> wens, it could be since the lestest datasheet revisions doesn't mention it.. but it coulc also be a error untroduved in last revisions datasheets..
<tuxd3v> latest*
<tuxd3v> could also be a errors introduced*
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<hlauer> submitted my patch v3 for axp209 charge enable/disable on 12 May 2021 to the lists, but did not hear anything so far
<hlauer> wens et al, could you please have a look?
<hlauer> thanks!
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<tuxd3v> wens, here is my changes to pwm.. I tried to assign pin PA6 : https://paste.debian.net/hidden/ef76a047/
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<wens> tuxd3v: to use pwm1 you will need to fix the driver. right now it thinks there's only one channel
<wens> then it's just a matter of pointing to the right channel from whereever you are using it
<tuxd3v> pwm-sun6i
<tuxd3v> I will take a look at it, many thanks
<tuxd3v> o its pwm-sun4i
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<tuxd3v> wens, I believe I only need to change this: https://paste.debian.net/1199757/
<tuxd3v> I didn't look extensibly to the driver..
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<karlp> is there any way to verify that a dtbo has been applied? the uboot log says it has, and I've got this fragment: https://paste.jvnv.net/view/3F6zx
<karlp> but I don't seem to get pullups on uart2 rx at least.
<karlp> is there a better wya than poking devmem at the pullup registers?
<karlp> ok, zeros for my pits in the PA_PULLx registers, so I guess those overlays didn't really do the right thing :)
<karlp> well, manually poking doesn't fix it anywya. guess external pullup then.
<wens> check /proc/device-tree for final results?
<mripard> karlp: how do you apply it?
<karlp> using armbian's allwinner overlay magic glue, https://docs.armbian.com/User-Guide_Allwinner_overlays/ which _normally_ works, so possibly the fragment is wrong.
<karlp> manually writing to to the port A pullup/down register doesn't result in a sufficient pullup anyway, an external pullup works, but would like to be able to diagnose and rely on these things more.
<karlp> I have an entry /proc/device-tree/soc/pinctrl@1c20800/k_uart2_rx/ with a "bias-pull-up" file there, so it _should_ have been applied?
<mripard> you want U-Boot to apply it, but it looks to be the case indeed
<mripard> k_uart2_rx isn't a node in the kernel though, so you apply it at the wrong place
<karlp> I thought the names were pretty much free text, or can yo uonly have one node addressing a given pin?
<karlp> so given that there's also /proc/device-tree/soc/pinctrl@1c20800/uart2 which also covers PA0/PA1, does that mean mine gets ignored?
<mripard> the names are free text, but only the nodes dereferenced in the spi controller pinctrl-* properties are going to be used
<mripard> and the other ones completely ignored
<mripard> so you want to modify those nodes, and not just add new ones
<karlp> so that's the before: after { } names both right?
<karlp> I've never really followed when I need which name, and why we need both :)
<mripard> no, it's just your "after" that have to match
<karlp> and I can apply something like bias-pull-up to only _one_ of the pins though?
<karlp> uart2-pins is an existing node, with pa0/pa1, and I only want to apply to it rx.
<mripard> then you need to create a new node entirely, and make the spi controller use it intsead
<karlp> ok, that applied properly now, it at least shows up in the PA_PULLn register: https://paste.jvnv.net/view/k9kVo
<karlp> (I have spi problems too, but they're different...)
<karlp> I'm trying to clear out the "easy" verification before I go back to figuring out my spi issues..
<mripard> yeah, but now you won't mux the other pins
<mripard> you should really create a new node and make uart2 use it
<jernej> karlp: I find new DT overlay syntax more intuitive and less error prone, it's like extending existing DT, like https://github.com/LibreELEC/dt-overlays/blob/master/overlays/allwinner/sun50i-a64-pine64-wifi-bt.dts
<mripard> jernej: yeah, the new syntax is neat
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<karlp> you mean it wouldn't mux the other pins to uart? it seems to at least.
<karlp> so, I have a few gpios I've not yet setup in dt, leds and inputs. the leds work just fine in the sysfs interface, I know it's not a permanent solution, but just for testing the hardware it seems fine.
<karlp> but the inputs, on PC0/PC3 dont work at all.
<karlp> they export ok, but the values never change.
<karlp> and the port C config register had PC0 and PC3 listed as just 0x7: IO disable.
<karlp> manually pking that to 0x0: input, and now they work?
<karlp> the led is on port A.
<karlp> is this "user error using deprecated sysfs" or is there something else at play?
<karlp> I have an output on PE12 that works fine too, this is only inputs.
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<karlp> python's gpiod (which uses the chardev) reports "No such device" for PC0,1,2,3 but works for PA6 and PE12, matching the sysfs experience.
<karlp> I suspect spi0 is enabled when it shouldn't be...
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<karlp> hrm, spi0 is disabled in dt at least.
<MoeIcenowy> BTW, REing BROM of D1 today
<MoeIcenowy> and I found that when doing FEL_VERIFY_DEVICE, tag is now used
<MoeIcenowy> (the names are taken from https://linux-sunxi.org/FEL/Protocol
<tuxd3v> Changinf pwm-sun4i from channel 0 to channel 1, I only need to change this macros right?
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<karlp> or, am I reading it that Port C can't be used for external ints, only polled?
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<karlp> there's no registers in the h3 datasheet for it, so I guess that's why the libgpiod chardev is refusing me to attach an input to it?
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