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<warpme_> apritzel: i'm curious your opinion: i'm working on thermal for h616. currently it looks i have issue with accessing ths calib data. to verify my thinking - i started to look on working ths on h6 and....have issue with peekpoke. i'm trying to read h6 calib data. dt is like this: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi?h=v5.12.9#n265 issuing peekpoke -b
<warpme_> 0x03006000 r.l 0x14 gives 0x0. peekpoke -b 0x03006000 r.l 0x18 also 0x0. how this?
<apritzel> warpme_: I read the same from U-Boot. Maybe that's the data? Or it is non-accessible from non-secure? Let me check ...
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<warpme_> apritzel: hmm. ths on h6 gives me sensible readings. looking on code i see https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/thermal/sun8i_thermal.c?h=v5.12.9#n226 and i'm reading this as: driver will not load when ths read from sid will be 0. as driver loads ok on my h6 - ths data can't be zero?
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<apritzel> warpme_: it's the same two zeros from EL3
<apritzel> yeah, looks weird
<apritzel> warpme_: I guess you need to dig deeper (printks in the THS and SRAM driver)
<apritzel> warpme_: ah, there is an offset of 0x200
<apritzel> so it's peekpoke -b 0x3006000 r.l 0x214 r.l 0x218
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<karlp> what's the difference between peekpoke and devmem2?
<karlp> ahh, more knobs and bits and timing stuff
<apritzel> karlp: and not being broken on 64-bit ;-)
<apritzel> but, for good measure, peekpoke has other bugs ...
<warpme_> apritzel: argh. silly me as i read .offset in wrong way!
<karlp> devmem2 being broken on 64bit sounds like somethign that would surely be addressed right? how is that sort of thing _still_ broken in this day and age?
<karlp> man, power is rad. running linux on this h3 board, ~50mA. shutdown -h => 70mA.
<apritzel> karlp: I guess because devmem2 isn't a proper package, more a dumped source file somewhere?
<apritzel> karlp: most H3 boards don't have a PMIC, so poweroff isn't well implemented
<apritzel> similar issue on the H5, but we made some effort in TF-A to bring the power consumption down anyway
<apritzel> not sure if crust adds something to that
<karlp> devmem2 is a package for me?I always presumed it was just the busybox one, and got updated as it was updated there.
<karlp> never needed to look to be honest :)
<karlp> yah, the power consumption doesn't really bother me, this is an always on device, mains powered, just fun thing to notice in testing.
<karlp> huh, devmem2 on ubuntu says it's from lartware, which is a very very very old outdated page, with a no-longer functional php server...
<karlp> so yeah, that's clearly not getting maintained by anyone :|
<apritzel> karlp: I think I tried to report/fix it somewhere back then, but this didn't go anywhere
<karlp> https://git.busybox.net/busybox/log/miscutils/devmem.c doesn't look like it's has any meaningful changes since it was created either,
<apritzel> karlp: but that version is actually correct
<karlp> yeah, https://bugs.busybox.net/show_bug.cgi?id=10171 says that they used to have devmem2 and have dropped it in favour of the internal, functional one.
<karlp> so now we just need ubuntu et al to get busybox back instead of this dangling devmem2.
<karlp> surprised this sort of thing has lingered so long, but I guess it's pretty niche group of people who need it.
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<gamiee> karlp: 70mA power usage isn't the biggest issue. For some reason, all of my H3's after shutdown start getting hot
<karlp> well, I should say, this is 70mA at 12V, so yeah, 840mW..
<gamiee> Ohh, it's 12V, then it totally makes sense
<apritzel> karlp: oh, really? On my H5 I measure between 50 and 70 mA @ 5V (with my stupid "USB doctor" meter) in "poweroff"
<apritzel> wasn't there some h3 fake power off binary somewhere?
<apritzel> which basically turned off as much as possible (cores, devices, PLLs, ...)?
<gamiee> Wouldn't be solution crust? Crust can disable most of peripherals too, isn't it ?
<karlp> I wouldn't use my number as any sort of gospel, it's just this board's "on" vs "off"
<apritzel> gamiee: yes, but H3 support is WIP for crust, AFAIK
<apritzel> and I don't know if Linux would actually ask crust for poweroff
<gamiee> apritzel: yes, it is still WIP, although, as far as I remember, some H3 device configs are inside crust already.
<apritzel> on 64-bit systems we get this through Trusted-Firmware, which Linux asks via PSCI SYSTEM_OFF
<apritzel> and TF-A then talks to crust
<gamiee> can't crust detect somehow that cores are "inactive"?
<apritzel> on the H3 there is no TF-A (yet?), but we could go through U-Boot's PSCI implementation, and call crust from there
<apritzel> gamiee: I don't think this wouldn't work
<apritzel> gamiee: the best thing you could look for is "all cores in WFI", but that doesn't mean "power off", it's just that Linux is idle
<gamiee> apritzel: Isn't TF-A only for 64-bit devices?
<gamiee> U-Boot's PSCI implementation could work, I actually could look into it .
<apritzel> gamiee: originally it was, but for some years it now supports ARMv7 as well
<apritzel> There is a port for the Rockchip RK3288
<apritzel> gamiee: AFAIK smaeul was playing around with an H3 TF-A port
<apritzel> gamiee: please update it to PSCI 1.0 on the way ;-)
<apritzel> (the U-Boot implementation, I mean)
<gamiee> Interesting, I will take look on smaeul github if I will find some work about this
<apritzel> gamiee: for the TF-A port? I think the SRAM size was a showstopper there, so not sure this is going anywhere
<gamiee> apritzel: well, then U-Boot is the only way then.
<apritzel> yeah, should be much easier anyway
<gamiee> Well, I don't have much skills with PSCI yet, so I'm not sure if I will be able to update it (at least at this time :D )
<apritzel> gamiee: it's fairly simple, actually, you just need one additional function to advertise which function you implement
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<apritzel> and the basic PSCI interface and functions are straight-forward
<apritzel> you can skip over all those fancy cluster power management stuff
<gamiee> well, then I might give it a try, the heat problem on shutdown is kinda huge problem (for me), since without fan, H3 can get up to 80C even with heatsink (inside a case)
<apritzel> what is actually happening at sunxi arm32 poweroff? there doesn't seem to be some poweroff device for mach-sunxi?
<apritzel> (in Linux, I mean)
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<karlp> everyone keeps talking abotu these hot h3s, but mine are just running finger touch cool no heatsink.
<gamiee> karlp: this also depends on the circuits. Since H3 doesn't need PMIC, all required voltages are required to be supplied externally. For example, Orange Pi Zero Plus2 overheats even when it's idle. 70C - 85C is totally "normal" temperature for it.
<gamiee> There was some discussions that Orange Pi made some changes to power ICs to cut-off price, but introduced overheating
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<apritzel> gamiee: or you use this https://github.com/Icenowy/h3-arisc-shutdown
<gamiee> apritzel: ohh, this looks like great temporary workaround, thanks!
<apritzel> gamiee: there is also h3fakeoff somewhere
<warpme_> guys: school level q: if https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/thermal/sun8i_thermal.c?h=v5.12.9#n524 returns -22 - is most probable reason an wrong IRQ number assigned in DT?
<apritzel> warpme_: what tells you it's this call that returns the EINVAL? There are tons of other returns in that function?
<warpme_> apritzel: i put line-after-line printk and devm_request_threaded_irq returns exactly -22
<apritzel> warpme_: then you should repeat this exercise in request_threaded_irq()
<warpme_> h616 manual says: "Step10: Set GIC interface based on IRQ 51, write the bit[19] of the 0x03021104 register to 0x1.". I declared in DT Int51 for ths - but not sure what manual author was in mind saying "Set GIC interface based on IRQ 51"...
<apritzel> I guess that's Chinglish for "use SPI 51" (as you did)
<apritzel> just worth checking if it's IRQ 51 or SPI 51 (offset of 32 being the difference)
<apritzel> warpme_: looks like it's IRQ 51, so you specify <GIC_SPI 19 ...> in the DT
<warpme_> apritzel: ok i changed DT to SPI19. Now /sys/firmware/devicetree/base/soc/thermal-sensor@5070400/interrupts has 0x33 (51 in dec.). Still -22. Looking in /proc/interrupts i don't see GICv2 alloc.with 51. Is that when Int is not enabled - it will be not listed in /proc/interrupts?
<apritzel> warpme_: yes, only enabled IRQs show up there
<apritzel> but the DT dump should not read 0x33, but 0x13
<apritzel> are you sure you are using the right DT
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<warpme_> hmm. when i'm doing property view in hex (/sys/firmware/devicetree/base/soc/thermal-sensor@5070400/interrupts) i'm getting | 00 00 00 00 │ 00 00 00 33 │ 00 00 00 04 │0x33 is 51. is this wrong?
<warpme_> dt is like this:
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<apritzel> those two do not match
<apritzel> (common mistake #14: "updating some file, but still loading an older copy"?)
<warpme_> :-\ let me check then :-)
<warpme_> yeah. rebuild kernel on cross builder, sync target rootfs image but not boot part (where dt is)
<apritzel> SPI 51 is already used by pinctrl, so you can't request it
<warpme_> hmm......
<warpme_> 54: 1464 0 0 0 GICv2 51 Level ths
<warpme_> :-)
<smaeul> yes, of course crust adds something to H5 boards, real suspend/resume and real poweroff :) (including wakeup from either via button, IR remote, or RTC)
<smaeul> crust does not officially support H3 yet, due to BROM bugs
<smaeul> once I have those worked around, it will have the same feature set as H5
<warpme_> now need to check is too low temp because sid calib data is nok or .... (calib routine is from BSP so should be ok...)
<apritzel> was just wondering that's it's quite chilly in your room ;-)
<gamiee> smaeul: what kind of BROM bugs???
<warpme_> oh you know - west EU is colder - but not that much :-)
<warpme_> i mean east
<smaeul> gamiee: the CPU0 hotplug path is broken, so I have to use the "super standby" path
<smaeul> and that means BROM will mess with some clocks during resume, which I have to account for
<smaeul> apritzel: H3 would use PSCI => SCPI to communicate with crust, same as 64-bit boards
<apritzel> smaeul: in U-Boot?
<warpme_> apritzel: may thx for help!
<warpme_> may->many
<smaeul> there's no need for detect anything, PSCI_POWER_OFF works fine :)
<smaeul> *PSCI_SYSTEM_OFF
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<apritzel> smaeul: sure, but AFAICS SYSTEM_OFF is not implemented for sunxi atm
<apritzel> in U-Boot
<warpme_> apritzel: i promise: i'll read full https://www.cl.cam.ac.uk/research/srg/han/ACS-P35/zynq/arm_gic_architecture_specification.pdf 3 times to not bother you again with silly Q about interrupts :-)
<apritzel> warpme_: https://developer.arm.com/documentation/ihi0048/latest/ would be the canonical source
<apritzel> but that's only child's play compared to the 930 pages of the GICv3/v4 spec ;-)
<apritzel> warpme_: but no worries, this offset of 32 is a common pitfall, and it's something that the DT binding introduced
<apritzel> and you should not need to know about the GIC internals, as this is perfectly wrapped by the Linux irqchip driver
<apritzel> warpme_: all you need to know is the number, the domain (SPI/private IRQs/IPIs), and the configuration (edge vs. level)
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<warpme_> indeed. now it becomes much more clear (especially after pict. on page 2-23)
<apritzel> warpme_: the GIC is a real beast, especially if you dive deeper, so be warned
<apritzel> best is not to go here, helps you stay sane ;-)
<smaeul> apritzel: right. mainline u-boot is still using PSCI v0.1 for sunxi, which doesn't have a SYSTEM_OFF function
<apritzel> smaeul: yes, because the original PSCI impl in U-Boot was only v0.1
<apritzel> this was later updated, but only per platform
<apritzel> smaeul: so to make this clear: it's probably fairly easy to hook up something in U-Boot PSCI, but I was wondering how this works today
<apritzel> it looks like PSCI SYSTEM_OFF returns -1, if Linux even tries to call it
<apritzel> so does the last core then just hang in some loop, probably even without WFI?
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<wens> learned yesterday that some SoCs have partitioning for PMU PPI :/
<wens> also learned about pseudo-NMI's on GICv3 using different priorities
<apritzel> wens: wait till you meet the ITS, and virtual interrupt injections ;-)
<wens> curerntly looking at how to make NMIs work through the partitioning irqchip
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<apritzel> warpme_: is that .ft_deviation that takes core of a temperature offset?
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<MoeIcenowy> apritzel: I think the PSCI framework in U-Boot is now enough for 1.0
<MoeIcenowy> but we only implemented enough functions for 0.1
<MoeIcenowy> and nothing more
<apritzel> MoeIcenowy: exactly
<apritzel> it's probably just a matter of defining the missing functions
<apritzel> and update some flags or something
<MoeIcenowy> apritzel: I remember there was some Kconfig option that selects PSCI ver
<jernej> smaeul: I didn't notice any issues using Crust on H3 for now
<jernej> is there any specific case which fails?
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<sunshavi> testing, ignore it
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