15:56 <doggodile> Didn

15:56 <doggodile> didn't see I needed to reigster!

15:56 <doggodile> G'day. First of all thank all of you, as a collector of strange artesian SBCs from the depths of Aliexpress, the sunxi documentation has been so useful. I have a bit of a question:

15:56 <doggodile> I'm giving a four layer pcb design a go and it would be very convenient if I can reorder the bits of the LCD interface to the LCD header, i.e, Route "LCD8" on the SOC to LCD_D0 on the display. Skim reading the FEX guide suggests this might be possible, as you define each data bit with physical GPIO (lcdd0 = port:PDX<2><...><...><..> etc), but browsing the linux-3.4 display driver I am less sure. Does anyone have experience with this?

15:56 <doggodile> Would be great if that's true as I've already finished a layout for this with length tuning and such.

15:57 <doggodile> Cheers,

16:01 <doggodile> Oh, and if it matters, this is for an F1C200 board

17:35 <hramrach> gamiee: hm, f1c200 does not seem supported so far, the closest is f1c100 lichee pi nano. There is a doc https://linux-sunxi.org/images/5/5e/Allwinner_F1C200s_Datasheet_V1.1.pdf but can't be relied on without testing

17:44 <hramrach> hm, the f1c100 and f1c200 should be about the same so the lichee pi nano support can be used as good example, it even uses the display

22:31 <doggodile> Once again struggling with IRC auth

22:31 <doggodile> he F1C200 is a higher RAM variant of the F1C100 - beyond that they should be functionally identical.

22:31 <doggodile> My question stem's form a lack of experience with FEX and it's implications, and given the sparse User Manual documentation (I had to read the driver code to find out that i8080 mode isn't hardware accelerated but software bitbang) I was wondering if that is a fair assumption to make about the Video unit in general

22:31 <doggodile> I'll have a looksie into the lichee nano specific documentation to see if I will find anything

22:31 <doggodile> Ah! It seems the lichee nano's LCD pinout exposes only GPIOD, thus requiring remappable pins (Lacking the LCD mux option pins on GPIOE for LCD0 and LCD1)

22:31 <doggodile> Thanks for the recommendation, probably wouldn't have checked

22:32 <doggodile> [Preceding "I'll have a look":] I would assume Allwinner takes a reasonably modular approach to their chip design, and what ever video interface goes in one unit is likely indicative of, at a minimum, their ethos and mentality into lcd_if design

22:33 <doggodile> I should have a handle on IRC auth now, so no more confusing (out of order) reposting, I hope.

23:34 <smaeul> doggodile: i8080 is hardware accelerated. see TCON0_CPU_IF_CTRL_REG and the following 3 registers