ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<millenialhacker> sven, could you share again the link to nvme v2 ?
<sven> sure
<millenialhacker> Thanks!
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<millenialhacker> I'm trying to follow hypervisor Wiki. (I'm planning to run a dev MacOS/XNU kernel in Hypervisor mode to get some details about Camera driver)... It seems I need another machine, am I right?
<millenialhacker> Two in total (one Mac for development), another Mac or Linux to push kernel stuff via proxy
<sven> yes
<sven> the mac will run xnu under that HV and the other machine will be used to control the HV
<millenialhacker> Got it, that's unfortunate, I have no other machine handy, I wonder if a RpI may work as hypervisor controller
<millenialhacker> I don't want to use work one since that belongs to Amazon, and I don't want to enter in some weird situation due to NDA/Contract stuff with my employeer
<mps> millenialhacker: any machine could be used as hypervisor 'controller', with proper usb cables, ofc
<millenialhacker> I would order a RPI then. Ty
<marcan> keep in mind a RPi will not cut it for high-bandwidth HV usage, but if you're just tracing the camera it's probably OK
<mps> OT but there are better arm64 SBCs than rpis
<marcan> tracing is bottlenecked on the host/python most of the time, and a RPi will bottleneck way worse than a proper machine
<marcan> but that's proportional to how much tracing you decide to enable
<marcan> the HV will happily run with zero I/O if everything is off (as in you can literally yank the cable and the guest keeps running)
<millenialhacker> I thought HV was doing tracing with minimal impact in performance, but it seems it's actually waiting for host to decide what to do with packets and that back and forth is the bottleneck, did I get it right?
<marcan> there are async and sync tracing modes
<marcan> async uses a big fat buffer and the host processes that as fast as it can (which is still bottlenecked on python even for simple r/w prints in practice, before the USB bandwidth)
<marcan> sync actually stops the guest and is limited by USB latency
<marcan> you can configure the mode individually for everything you trace
<marcan> for ISP you will need to trace the ASC, which means you will need to sync trace the mailbox registers since the host will have to react to those synchronously to be able to pull payloads out of the buffers at the correct time
<millenialhacker> Cool, I'm sure I will come back with some handy questions lately once I have everything set it up properly.
<marcan> (there is already a generic ASC tracer but you will need to write the subclass of that to handle ISP and whatever its app-specific endpoints mean and how they work, as you figure it out)
<millenialhacker> marcan: That's really helpful info, thanks
<marcan> millenialhacker: look at hv/trace_pmgr.py and PMPTracer (and the commented out instantiation below it) for an example of how to get started
<marcan> you don't need the PMGR/iomon stuff, I'm just pointing that one out because it's the most barebones ASCTracer subclass we have lying around I think
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<millenialhacker> Can anyone give me some context about PCI and DART and how they are related?
<millenialhacker> I assume is Device Address Resolution Table, but not sure
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<sven> dart is the iommu for any pcie device
<sven> so any DMA transaction from a pcie device uses the page tables configured inside dart to get the actual physical address
<millenialhacker> Thanks! I see a lot of DART stuff after enable some ISP debug.
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<millenialhacker> :23.889611 +0200AppleH13CamIn::AllocateSharedMemorySurface - Shared memory region mapped at DART translated address: 0x1824000AppleH13CameraInterfacekernel
<millenialhacker> :23.889619 +0200AppleH13CamIn::AllocateSharedMemorySurface - Successfully allocated surface. surface-id=0x0000000E, surface address: 0x<private>, size=35651584, dartMapBase=0x1824000AppleH13CameraInterfacekernel
<millenialhacker> Like this!
<millenialhacker> which makes me thing that actually, ISP[/Camera is still being exposed over PCI-e on M1 but I'm noob on this stuff
<sven> dart is also used for just about every other device than can DMA
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<millenialhacker> So it could be DART/I2C, right?
<sven> pretty sure we would’ve seen the camera already if it was on the pcie bus
<sven> what makes you think i2c?
<millenialhacker> I'm trying to reverse engineering the kext
<millenialhacker> AppleH13CameraInterface
<nicolas17> are you planning to contribute to asahi?
<nicolas17> did you read the reverse-engineering policy?
<sven> sure, but how does that relate to i2c?
<millenialhacker> "AppleH13CamIn::%s - I2C slave error, smsta=0x%
<millenialhacker> "AppleH13CamIn::%s - I2C slave error, smsta=0x%
<sven> ah! this should also be in -re please
<millenialhacker> Unable to identify FHSi device, I2C status 0x%08x
<millenialhacker> Moving there
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