<YichaoYu[m]>
But you told me to not do that since there's nothing to be done to the kernel
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<maz>
YichaoYu[m]: maybe I wan't clear enough: IMO there is nothing more to add to the kernel code. what needs doing is the the JSON file that describes the events in userspace.
<YichaoYu[m]>
but as I said in the email, compared to other arm cores, there are indeed things that are still missing in the kernel code
<maz>
which email?
<maz>
if you don't cc me, there is exactly zero chances that I'll see it.
<YichaoYu[m]>
I sent an email to linux-arm-kernel and cc'd you and everyone I found i maintainers that related to pmu
<j`ey>
YichaoYu[m]: you used maz's old email by accident
<j`ey>
is it get_maintainers.pl that gets the old email?
<maz>
under some circumstances, yes. robh fixed it recently, but there may be other occurrences. here, I doubt it did spit anything wrong, as my old email address never got any close to the M1 PMU...
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<millenialhacker>
How could I get the mailbox address of a given ACS? I'm creating a Tracer and I see a lot of MMIO R/W
<povik>
i wonder why i can't get AOP to boot
<povik>
i set DAPF according to filter-data-instance-0 we found in ADT the othery day
<millenialhacker>
But I'm not sure how to move forward from that point, I see other tracers with a REGMAP which I'm not sure where they come from.
<povik>
then it's RUN=1 in CPU_CONTROL
<povik>
but no HELLO
<povik>
what can i be missing?
<sven>
millenialhacker: start with an empty regmap and add registers when you figure them out. that's usually how those are created
<sven>
povik: maybe it needs to be brought up with the same message like SMC?
<povik>
let's see
<sven>
or maybe just trace whatever macos does
<millenialhacker>
Well I found one IRQ register :D
<sven>
wouldn't surprise me if there's a _third_ way to start these things
<millenialhacker>
sven: is it safe to assume MAILBOX messages will be always 8 bytes long? (R.8 and W.8 respectively)?
<sven>
my memory's a bit fuzzy, but I think the HW requires 64bit reads/writes to advance the FIFO.
<sven>
8 bytes is probably a good assumption
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<sven>
well, actually 1x 64bit and 1x 42bit or or so + some status bits so that it's a 64bit read anyway
<sven>
64+32 bit actually, but both read/written with a 64bit read/write
<millenialhacker>
Cool, I think I can filter out non-eight bytes read/writes to see if I can spot interesting stuff
<povik>
millenialhacker: if you are tracing a coprocessor with the usual mailbox interface, you should probably base your tracer on the infrastructure that's already there
<povik>
maybe you need to do p.pmgr_adt_clocks_enable("/arm-io/dart-isp")
<povik>
although i wouldn't know if that's okay in a tracer script
<povik>
hopefully macos will cope
<millenialhacker>
povik: that seems to do the trick.
<millenialhacker>
but then Mac OS doesn't boot :D
<millenialhacker>
rainbow logo without progress bar
<povik>
lol
<povik>
does it say anything?
<millenialhacker>
no, but rebooting it seems to work. So it's a little bit unstable I'd say
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<millenialhacker>
svan: I see there are two kind of mailboxes in Linux Kernel, ASC and M3, how could I know what's the one in my M1?
<Jamie[m]1>
it’s different for each peripheral
<Jamie[m]1>
(and there are even more variants not in the kernel yet, like the 32-bit M3 in the AVD)
<jannau>
millenialhacker: ascwrap or m3wrap in the compatible in the adt
<sven>
unless you're playing around with thunderbolt it'll be asc
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<millenialhacker>
I see no ascwrap/m3wrap in ADT for ISP node, does that means ISP node is not using mailbox, or that compatible tag is inserted by M1n1 while parsing the ADT?
<povik>
m1n1 wouldn't insert any compatible tags that aren't there already
<Jamie[m]1>
i don’t believe m1n1 does any ASC modifications (it modifies the linux DT based on stuff from the ADT)
<Jamie[m]1>
s/ASC/ADT sorry
<millenialhacker>
interesting...
<povik>
indeed it looks like ISP has its own special interface
<povik>
millenialhacker: i suppose you haven't been getting anything sensible using ASCTracer on it
<jannau>
only hint in the ADT is 'asc-dram-mask' so it might be asc or something more or less compatible
<millenialhacker>
povik: I see only CPU_CONTROL nothing more, I was able to map some values in the logs to memory address but beside that nothing else.
<millenialhacker>
I see some memory addresses that are accessed always in the same way when I poweron the camera
<millenialhacker>
but I was trying to get Mailbox messages to be detected, but as jannau said, maybe is not compatible to asc
<povik>
yeah, that looks like ASCTracer will do you no good
<povik>
the mmio interface is different
<povik>
the CPU_CONTROL isn't i suppose CPU_CONTROL = (RUN = 1) or something to that effect
<millenialhacker>
I think ISP is doing the following: It's mapping several DMA/DART region, it's using this as shared memory for channels (ringbuffers), and it's using I2C to talk with Camera
<povik>
i know it has been discussed here before but where do you get the idea there's I2C involved
<millenialhacker>
From static RE the Apple Driver
<millenialhacker>
^ povik
<povik>
ah
<marcan>
all the I/O is 32bit so that's obviously not the usual ASC mailbox
<marcan>
but the funny thing is the firmware does have the usual RTKit strings in it
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<marcan>
there are a ton of DART instances too, which are also part of the wider ISP reg map (and thus show up wrong in mmiotrace)
<marcan>
a lot of the IO traffic is just DART noise
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<sven>
a ton of dart instances? Wtf did they do there?!
<marcan>
yuuup
<marcan>
there's *6*
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<marcan>
and also isp0 maps some random pmgr pstate register range and pokes it direclty, because of course it does
<marcan>
(that's the second reg)
<sven>
maybe it’s the same hack used for usb but with six instead of two darts :D
<marcan>
or maybe it's 3 instances and each one has 2 reg blocks?
<marcan>
there is some "real-time" thing, maybe there's something special about these DARTs since they're used for video capture?
<marcan>
disp0 also has that prop
<marcan>
and ave0 (??)
<marcan>
(maybe because it's used to encode camera output?)
<marcan>
actually the instance stuff says some of them aren't DARTs, they're "SMMU"?
<marcan>
then again disp0 also claims to have two things, a DART and an SMMU
<sven>
SMMU was that weird thing where you could see something like the cache in the MMIO
<marcan>
yeah, makes sense, it's before the DART in disp0 and I remember that
<marcan>
so then 3 DARTs for ISP
<marcan>
and some other SMMU nonsense
<marcan>
look like one specifically for realtime stuff which kinda makes sense, and no idea why they have 2 more
<sven>
and trad/bulk is that weird usb thing iirc (two darts where half of the transaction go through the first and the others to the second but the boundary didn’t make any sense)
<marcan>
USB has LLT/BLK
<marcan>
this has LLT/BULK/RT apparently
<marcan>
note BLK vs BULK
<marcan>
lol consistency
<sven>
:/
<marcan>
millenialhacker: sounds like you're going to be having a lot of fun :p
<millenialhacker>
marcan: How did you parsed the instance stuff?
<millenialhacker>
marvan sven fyi, I just noticed mostly access to addresses ISP.REG[0] and DARTISP.REG[0] memory regions
<jannau>
millenialhacker: parse instance as ascii and look for DART
<millenialhacker>
sven what do you mean exactly?
<sven>
that pdf you linked is not related to what apple calls SMMU
<millenialhacker>
Oh, thanks!
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<millenialhacker>
marcan: I thought that ISP/Camera could be one low hanging fruit, it seems I'm deeply wrong and probably this is outside of my skillset, but will try to get more info. :)
<sven>
sounds like it’s a good way to grow that skillset then ;)
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<millenialhacker>
This is by far the most hilarious thing today:
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<millenialhacker>
I'm trying to do some analysis based on most-frequent accessed io memory addresses. Have anyone tried something like that? I created some utilities methods in Tracer class but I want to know if not reinventing the wheel