ChanServ changed the topic of #asahi to: Asahi Linux: porting Linux to Apple Silicon macs | General project discussion | GitHub: | Wiki: | Topics: #asahi-dev #asahi-re #asahi-gpu #asahi-offtopic | Keep things on topic | Logs:
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<maz> kettenis: gah. life got in the way and my brain is pretty similar to that of a goldfish these days. please respin the series, and I'll get on it (I need to revive my own PCIe series).
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<marcan> alyssa: I assume sven ran off of my old minimal .config, which was intended to keep kernel sizes down for loading over uart, and supported ~nothing :p
<marcan> that is... not the way to go any more :p
<kettenis> maz: I know the feeling; every time I want to send a patch I need to lookup the magic git send-email incantation
<sven> marcan: btw. i have some test asc driver for m1n1. i can push the WIP version if that helps
<sven> it's barely enough to bring ANS up but maybe you can reuse some helper functions or something
<marcan> sven: sure, might help
<marcan> sven: ah, in C, I'm doing it in python
<marcan> so not useful then :p
<sven> i also some python hack, gimme a second :D
<sven> but that one's even worse
<sven> marcan: not sure if that one even still works though
<sven> and that here was also in the stash, i assume that some of that will be required
<j_ey> sven: marcan said he was going to do this all in python
<j_ey> (on stream, just now)
<sven> uh.. yeah.. he also said that a few minutes ago in here
<j_ey> o
* j_ey hides
<kettenis> so one tricky thing about IOPs is that after bringing them up you either have to shut them down again or make sure the memory you've given them is reserved
<kettenis> u-boot does reserve the memory
<sven> "// TODO: reserve this memory region" :-)
<sven> it kinda worked this way but uhhh... this was more of a workaround because i didn't want to go through u-boot all the time
<sven> i'm not sure it even still works
<pipcet[m]> kettenis: do we know how to shut them down?
<sven> kind of. if you send a magic incantation it will go to hibernate mode and you can redo the init dance
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<pipcet[m]> do you mean the 0x60000000000220 thing? (If we're documenting this anywhere, I'm afraid I've missed it)
<sven> something like that, i wrote it in this channel some weeks ago
<sven> i don't fully understand what it's doing yet, need to reverse more of RTKit for that
<sven> i think it was 0x60000000000010, then 0xb0000000000010 and then 0x60000000000020
<sven> first two send it to hibernate mode, last one brings it back up again
<sven> but again: i don't really understand what those do yet so they may have side effects
<pipcet[m]> thanks, found it
<pipcet[m]> sven: just in case it's of relevance: the old driver sometimes fails to bring up nvme, and the only thing that will "fix" it is to boot into recovery mode; a power cycle isn't enough. Your ans-bringup m1n1 branch gets it into that state if I call ans_setup(). Again, I think this is simply a bug in the old driver that probably won't affect what you're doing, but I think it's interesting that there's persistent hardware state for the IOP like
<pipcet[m]> that.
<sven> i wouldn't boot a linux you want to use from that branch. it's allocating persistent memory linux doesnt know about
<pipcet[m]> absolutely not :-)
<sven> just saying ;)
<sven> i don't know what the old driver is doing, but if you e.g. send an invalid 0x6.. or 0xb.. to get it to a power state it's already in it will crash
<sven> still strange the requires a recovery mode reboot though
<sven> i made that thing crash a lot and a simple power cycle was always enough
<pipcet[m]> (maybe it would be interesting to do a Recovery Mode -> macOS hypervisor trace and compare it with a Recovery Mode -> ANS bringup -> reboot -> macOS one)
<sven> probably noy
<sven> *not
<sven> iBoot brings up ANS and we can't see that
<pipcet[m]> yes, but something about the ANS setup is persistent across iBoot invocations (but not RM ones)... anyway, if I can help let me know but I'm assuming I can't :-)
<sven> i mean, if you care about this issue you can take the trace yourself
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<hendry> yikes, quite a few steps to install linux i see
<sven> for now :)
<sven> it'll be much easier once this gets to a state where it'll be useful for end users
<alyssa> marcan: yep, it's your .config with a bunch of stuff improved
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<marcan> hendry: that's for developers
<marcan> it has nothing to do with what the real installer will be like
<alyssa> hendry: i'm lucky i 'happened' to have an arm64 debian rootfs on a usb drive on my desk :p
<pipcet[m]> who doesn't, though? ;-)
<kettenis> me ;)
<hashcheck> thanks to all devoting time to this project.. big fan of other work with ports to consoles
<amw> Can some one explain what ANS / ASC means? It's not in the Glossary :-)
<amw> alyssa: I updated the SW:Linux Wiki to refer to a *much* better config file
<alyssa> amw: 👍
<alyssa> amw: not sure what it stands for, but the apple coprocessors
<amw> I never tried a using a USB key or drive for an initrd but did manage to mount them from the /bin/sh of the debian initrd via the USB
<alyssa> display (DCP), graphics (AGX), secure enclave (SEP) are all ANS / ASC
<alyssa> afaiu
<sven> asc = generic name for their mailbox protocol
<pipcet[m]> er, the initrd is loaded with the kernel
<sven> ans = nvme / storage coprocessor
<sven> or maybe even asc = generic name for all of their coprocessors
<alyssa> sven: `gfx-asc` is the gpu
<alyssa> er
<alyssa> interface
<alyssa> yeah idk
<sven> but i've also seen the name IOP for their coprocessors so maybe asc is the name for the protocol?
<alyssa> or other way around?🤷
<sven> all i know for sure is that ANS = name of their nvme / storage co-processor
<amw> Just updated the Glossary with very tentative notes for these terms - just wanted to understand what current focus is on
<amw> BTW - Thanks for the quick responses
<alyssa> sven: going to guess C in ASC is for coprocessor
<pipcet[m]> alyssa: the "gfx" has both "iop" and "asc" nodes in the ADT, but that's too many TLAs for me :-)
<alyssa> pipcet[m]: srsly
<alyssa> amw: please change your nickname to not a TLA ;p /s
<sven> if it's on macrumors it must be true!
<pipcet[m]> is it separate chips, though? I thought it was all one die?
<alyssa> pipcet[m]: All on one die, yeah
<alyssa> sven: Putting it together I'm making up that ASC = Apple Silicon Coprocessor
<alyssa> pop open the ANS2 Recoverable Panic pane, you might be interested
<pipcet[m]> doesn't the definition of "panic" preclude its being recoverable? seriously, Apple terminology is hard.
<alyssa> well.. :P
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<marcan> my guess for ASC was Apple System Coprocessor
<marcan> or Apple Support Coprocessor
<marcan> but yes, they also call them IOPs elsewhere, though ASC might be more specific
<marcan> I think there's non-ASC copros too
<marcan> e.g. there's the acio-cpu which is a cortex-m3 I believe
<marcan> and probably not ASC
<marcan> compatible = [iop,m3wrap-v2-acio]
<marcan> vs
<marcan> compatible = [iop,ascwrap-v4]
<marcan> that might mean it's actually based on the CPU type
<marcan> we know it's "chinook" for some of these, that could be the C
<sven> the sep has iop-sep,ascwrap-v4 and its ipc protocol is different from all those other rtkit-based processors
<marcan> though
<marcan> Chinook-ASC5
<marcan> Tempest-ASC5
<marcan> sven: are the mailbox regs the same though?
<marcan> or is it different at that level too?
<sven> yes
<marcan> then it still fits that ASC is the hardware type
<sven> it just has the endpoint in the first register and you alsways write/read 0 from the second one
<marcan> and no syslog/etc?
<sven> nope
<sven> syslog/etc is a rtkit thing
<pipcet[m]> so...ASC might just describe the mailbox part?
<sven> and sepos is not based on rtkit
<marcan> ASC is just the concept of one of these big IOPs with this style of mailbox interface I think
<sven> yeah, that would make sense. and the sep is just a little bit special but you can kinda pretend it only has endpoint zero and then the same mailbox driver would work
<marcan> yeah
<marcan> sven: btw, the generic ASC driver has some special ANS crap, so there is precedent for doing it that way :p
<sven> you mean apple's generic asc driver?
<marcan> yeah
<sven> ans seems to be somehow special anyway
<marcan> yeah
<kettenis> some mechanism is needed to program the SART
<sven> it also has no-shutdown and some other properties in the DT that i think i've only seen for smc (or pmp? dunno) as well
<pipcet[m]> SMC and ANS have no-shutdown
<sven> i wonder if you can just reset the other processors by clearing that bit in the 0x44 register again
<kettenis> we'll need to come up with dt bindings for these things at some point
<sven> yes
<sven> also for nvme
<pipcet[m]> have you decided how to do the nvme yet? fake PCI bus, or adding non-PCI functions to the NVMe code?
<sven> arnd has a patchset that adds a platform driver backend to nvme. depends on the nvme maintainers though, but i don't expect to see a fake PCI bus
<kettenis> fake pci bus is retarded
<pipcet[m]> yes!
<kettenis> nvme binding is fairly straightforward
<marcan> the main thing is it depends on ANS, so it either has to have some hook to express that dep, or else we could have the ANS driver instantiate nvme instead of using nvme bindings
<arnd> the DT binding is the easy part in this case, splitting up the driver in a sensible way is slightly tricky
<marcan> I wonder if we could do something funny like make the ANS driver pretend to be a power driver
<kettenis> so if we model the ASCs as mailbox devices, referencing the ANS is simple:
<arnd> my patches do this with a set of fairly minimal changes to the pci-nvme backend, to simplify rebasing across kernel versions, but it's possible that the maintainers want a more thorough split\
<kettenis> mboxes = <&ans_mbox 32>;
<marcan> so nvme then implicitly calls out to turn on ANS before binding
<marcan> kettenis: yeah but the question is how to tie this to nvme
<sven> apple,mbox = <&ans_mbox 32>; ;P
<marcan> which doesn't really have anything to do with the mailbox, other than depending on that drive being up first
<kettenis> yup
<kettenis> so arnds platform device shim driver would activate the mailbox
<marcan> yeah, but then that shim would need an apple-specific bit there
<marcan> though I guess if apple is literally the only non-pci NVMe vendor out there, we can just stop pretending this makes sense elsewhere and just have the ans driver *be* the nvme platform device shim
<marcan> at least until some other vendor comes along and then we can figure out how to share code
<kettenis> I've already got this working in OpenBSD and U-Boot
<kettenis> although I still need to clean this up a bit in U-Boot
<kettenis> aplns0 at simplebus0
<kettenis> nvme0 at aplns0: NVMe 1.1
<marcan> :)
<kettenis> nvme0: APPLE SSD AP0256Q, firmware 2.120.4, serial 0ba010fae425241b
<kettenis> that's how it attaches on OpenBSD
<sven> openbsd just ignores the coprocessor and the mailbox, doesn't it?
<kettenis> at this point, yes
<kettenis> although I have a driver that attaches to the mailbox as well
<kettenis> aplmbox0 at simplebus0
<kettenis> just to check for messages from the coprocessor
<kettenis> if at some point we decide that u-boot should shut down the coprocessor
<kettenis> the aplns driver would poke the aplmbox driver using the standard mailbox bindings
<marcan> want more confusion?
<marcan> there's an AppleStockholmControl
<marcan> with ring buffers and endpoints
<marcan> ... but that's the secure element / NFC controller
<kettenis> appropriately named; those apple pay fanboys are defenitely in a hostage situation
<kettenis> I'm pretty pissed that apple is abusing their dominant market position to make my banking costs higher
<kettenis> anyway if we think the mailbox model makes sense, pretty much everything for NVMe can be covered by standard DT bindings
<kettenis> we just need to come up with appropriate compatible strings ;)
<marcan> yeah, though the concept of NVMe depending on a mailbox might be a bit strange ;)
<marcan> anyway, I think I'm going to try to actually get some early sleep today and then I might stream in the morning
<sven> i think in the end it will depend on a mailbox anyway. we can try to hide that in a power driver or something but then the power driver will depend on that mailbox
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<FireFox317> they are giving you all the credit regarding asahi work xd
<FireFox317> or rather, marcan s work
<FireFox317> well not only marcan ofcourse, but you get what i mean haha
<alyssa> FireFox317: ugh
<alyssa> if only one person gets credit for that photo it should be sven
<alyssa> and if only two people then marcan and sven
<steev> alyssa: sorry, you're the new spokesperson
<alyssa> and if only three people then marcan and sven and kettenis
<alyssa> steev: I mean.. alright, but why? i'm the gpu hacker, not the kernel hacker
<TheLink> and from a civil servant's perspective I need a mention because i didn't hinder the project at all
<steev> ^^
<FireFox317> alyssa: i guess your tweet had such a wide spread, that it reached people who really do no research before posting something lol
<steev> alyssa: no idea... it's just how those things go. most spread -> creddit
<alyssa> Sure. Why did my tweet have such wide spread though?
<alyssa> And why did my tweet from a week ago unveiling 150 hours of reverse-engineering not get such wide spread?
<alyssa> I don't understand social media at all.
<Bastian[m]> just having a picture probably makes it much more approachable
<alyssa> (well, s/media// but I digress)
<alyssa> Bastian[m]: Probably, yeah 🤷
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<pipcet[m]> alyssa: congratulations, you're famous. Seriously, though, all that attention has to be a good thing :-)
<alyssa> pipcet[m]: Heh, it's certainly a "thing" :)
<steev> people care about seeing it running more than the work that goes into it
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<sven> marcan: looks like i can't enable_irq() an irq ever again if i disable it with disable_irq_nosync from inside an irq handler before. removing irqd_irq_disable(d) from eoi fixes that but i don't know why or if that's the correct fix
<sven> -if (!irqd_irq_disabled(d) && !irqd_irq_masked(d))
<sven> +if (!irqd_irq_masked(d))
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<sven> that should be enough to bring up ans inside linux :)
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<kettenis> sven: it appears that the USB DARTs are not in bypass mode when m1n1 boots
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