#asahi on 2021-09-14 — irc logs at oftc.irclog.whitequark.org

2021-08-23 06:15 marcan changed the topic of #asahi to: Asahi Linux: porting Linux to Apple Silicon macs | General project discussion | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Topics: #asahi-dev #asahi-re #asahi-gpu #asahi-stream #asahi-offtopic | Keep things on topic | Logs: https://alx.sh/l/asahi

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02:00 <chadmed> hey, a blob is still better than no shape

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09:54 <nsklaus_> what is all this 'mailbox' talk going on around the porting effort ? is it some kind of lowlevel message passing handling service for hardware ? passing hardware related messages to some sort of queue to be then treated sequentialy ?

09:56 <j_ey> nsklaus_: exactly!

09:56 <nsklaus_> i've seen a lot of mailbox, mailbox, mailbox talk going on for a while, and i was wondering what it was

09:56 <j_ey> nsklaus_: its the IPC interface between the CPU and coprocessors

09:57 <nsklaus_> j_ey: thanks for telling

09:57 <j_ey> nsklaus_: you can transfer/recieve 64 bit messages

09:58 <nsklaus_> is it specific to the m1 arch ? i mean does linux on intel handle hardware events the same way ?

09:59 <j_ey> nsklaus_: no, there are multiple mailbox drivers already in linux

10:00 <nsklaus_> i see

10:00 <j_ey> this particular hardware/IPC is, but not the concept

10:01 <nsklaus_> i never heard it called like that before, is it some kind of new term for calling something that had existed before since a long time under a different name ?

10:02 <chadmed> its Arm's term for the concept

10:02 <nsklaus_> i see.. may i ask how that concept is called on intel arch ?

10:03 <nsklaus_> 'ipc call handling' maybe ?

10:03 <sven> https://en.wikipedia.org/wiki/Message_queue "In computer science, message queues and mailboxes are software-engineering components typically used for inter-process communication (IPC), or for inter-thread communication within the same process."

10:03 <chadmed> dunno if intel has a term for it beyond just calling them message queues

10:03 <chadmed> yeah what sven said

10:03 <sven> it's also not just an arm concept

10:04 <nsklaus_> i see, thanks for the links and replies

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12:16 <sven> anyone with a imx8mq-librem5 (probably this Librem 5 phone i guess) and/or any other board with a TI TPS6598x chip here who knows how to boot a custom kernel on those?

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12:35 <Emantor[m]> sven: whats kind of board do you have in front of you? Most boot either from SD/eMMC boot partitions or are waiting for bootloader upload in serial download mode.

12:35 <sven> the apple m1 :D

12:36 <sven> i have some patches to the tps6598x driver and want to make sure i didn't break anything

12:36 <Emantor[m]> Ah, my mind latched onto i.MX8MQ ;-)

12:38 <sven> i guess this TPS6598x chip might also be used some intel hardware

12:42 <Emantor[m]> Have you send the patches yet? Guido Günther was active on the driver and AFAIK works or worked for librem and should have a testboard on hand.

12:42 <Emantor[m]> I'd CC him and kindly ask for testing.

12:43 <sven> no, i just figured i'd try and see if someone here happens to be able to test this first

12:43 <sven> but that was my plan if that doesn't work

12:52 <Emantor[m]> https://support.lenovo.com/my/en/downloads/ds122276 looks like the X270 has the tps6598x controller.

13:09 <kettenis> bot in a way that is directly exposed to the OS

13:09 <kettenis> s/bot/not/

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15:33 <marcan> I think someone offered me a librem5 devboard at some point that was collecting dust... and I forgot who that was

15:37 <ar> cannot see it in my irclogs

15:37 <marcan> it was some kind of PM

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18:01 <opticron> hmmmm...apple event, here's hoping for the new MBP with M2/M1x

18:02 <i509vcb[m]> inb4 it's all software lol

18:03 <j_ey> well theres new ipad/iphones!

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18:14 <alyssa> i509vcb[m]: hey the last time Apple annnounced new software it was really .... err .... interesting

18:15 <sorear> are we expecting a summary later in non-video form?

18:16 <j_ey> yes, theres plenty of sites that cover it

18:17 <opticron> no mac hardware this time :/

18:17 <opticron> only i*

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22:17 <alyssa> maz: btw, did you check if (PORT_MSIADDR + 4) might in fact be PORT_MSIADDR_HI and we do have 64-bit msi's after all?

22:17 <alyssa> PORT_MSIADDR = 0x168 which is 8 aligned (not just 4 aligned) and the next known register is 0x208 so it doesn't seem completely far fetched

22:17 <alyssa> (on the other hand, why bother supporting 64-bits if you can get away with 32-bits always)

22:18 <alyssa> (for apple hw engineers, not drivers I mean)

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