marcan changed the topic of #asahi to: Asahi Linux: porting Linux to Apple Silicon macs | General project discussion | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Topics: #asahi-dev #asahi-re #asahi-gpu #asahi-stream #asahi-offtopic | Keep things on topic | Logs: https://alx.sh/l/asahi
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<RusselArbore[m]> .
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<sven> alright, just submitted the first versions for the mailbox. i guess in ~30 minutes i'll find some dumb mistake in there :>
<j_ey> turns out you didnt ever map MMIO in, and it was just accidentally working
<sven> :D
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<j_ey> sven: would be interesting if some other mboxes could use the new txdone
<sven> let's see if the maintainer even likes that mode first :)
<sven> but iirc there some other drivers that mentioned FIFOs
<sven> +are
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<xerpi[m]> sven: was checking apple_mbox_recv_irq, if between the while and the IRQ clear a new IRQ comes, you lose it because you blindly clear the IRQ afterwards, if I'm not mistaken
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<xerpi[m]> I think you first have to clear the IRQ, and then do the while (apple_mbox_hw_can_recv)
<j_ey> I think that comment says that even if it's acked, it will just fire again because there are still things to recieve
<xerpi[m]> Ah I see, so the IRQ is triggered just by the existence of new data on the FIFO, and not manually, right?
<xerpi[m]> Makes sense, got confused by the mailbox of another SoC, where the IRQs were manually triggered (after pushing data to the FIFO, etc)
<sven> yeah, please read the comments
<sven> they are there for a reason :P
<j_ey> that's what the 'level sensitive' bit means xerpi[m]
<sven> it's level sensitive. you can ack it all you want. if there's new data it will just fire again
<sven> but you have to ack it at the mailbox level at some point because otherwise it will keep firing even if there's no new data
<sven> it's a bit stupid, but i suspect that the four interrupts used to share a single line
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<xerpi[m]> Indeed, makes sense. Although the comment still made sense with the other mailbox model I was thinking about
<xerpi[m]> I think rather than "level sensitive" it is that "triggering the IRQ depends on the presence of the data in the mailbox"
<sven> IRQ_TYPE_LEVEL_HIGH- high level triggered
<sven> it's literally that. it triggers when the "mailbox has data" line is high and not only when the edge of that line rises
<j_ey> if it was edge triggered, there would be some way to see how many messages there were, I suppose?
<pipcet[m]> so it's level-triggered, but sticky?
<xerpi[m]> Yeah but the mailbox model where the IRQ is manually triggered (not linked to the presence of data), it can still be configured as level-sensitive
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<xerpi[m]> pipcet: good point, the presence/non-presence of data can only set the IRQ put not clear it
<sven> it's a chained interrupt controller with level triggered interrupts but i can get away without modeling it explicitly because each interrupt is also an independent AIC interrupt
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