marcan changed the topic of #asahi to: Asahi Linux: porting Linux to Apple Silicon macs | General project discussion | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Topics: #asahi-dev #asahi-re #asahi-gpu #asahi-stream #asahi-offtopic | Keep things on topic | Logs: https://alx.sh/l/asahi
<alyssa>
dcp->swap.swap.swap_id = resp->swap_id;
<alyssa>
Yo, I heard you like swaps.
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<marcan>
alyssa: I use "debug=0x14e serial=3 apcie=0xffffffef -enable-kprintf-spam wdt=-1"
<marcan>
that SError seems to be in SEP, which suggests it was shut down when it shouldn't have been?
<marcan>
do you get it during boot?
<marcan>
I haven't done much with macos post-SMP, but at least login screen and basic desktop stuff worked fine
<marcan>
also have you updated to 12.0 yet? :p
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<marcan>
just pushed a bunch of HV changes, though none that have anything to do with alyssa's SError afaict
<marcan>
alyssa: can you build from main and then addr2line the "rel" address in PC: 0x803b7c448 (rel: 0x10448) ?
<marcan>
(after reproducing again after the build of course)
<marcan>
I'm quite confused as to how you got an SError in a SEP address from m1n1 code; would help to know where it happened
<marcan>
the bad guest exception after that is "expected"; an SError while in m1n1 will corrupt exception state since I don't save it properly before re-enabling SErrors
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<marcan>
ah, I think I know how it happens
<marcan>
I think the guest can end up triggering multiple SErrors, and then the second one can get delivered in the middle of the HV
<marcan>
ah no, it happens with a single one, I didn't realize it's level-triggered
<maz>
marcan: odd. SError is actually specified as edge.
<j_ey>
marcan: did you see that povik got some audio working yesterday? ^^
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<marcan>
maz: nah, only *external aborts* delivered as SErrors are specified as edge
<kettenis>
anyway, I'll send a v5 that addresses the issues robh pointed out soon
<kettenis>
I'm not entirely happy with the text in the msi-controller binding
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<kettenis>
I retained the text from the .txt file, but maybe it needs a bit of a rewrite
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<maz>
Honestly, it looks good to me. so if you fix RobH's comments as well as the RC range I pointed out last week, we should be good. I'll ack that on the list.
<kettenis>
cool
<kettenis>
have some $DAYJOB stuff to do this afternoon, but I'll send it out tonight
<kettenis>
want to make sure this doesn't end up blocking your Linux driver
<maz>
yeah, same here. I'll push out the PCIe driver v4 as well.
<maz>
I think the PCIe driver may be blocker by the pinctrl driver anyway (no idea what the status of that is).
<maz>
s/blocker/blocked/
<j_ey>
maz: im hoping to send out a first version this week
<maz>
j_ey: ah, cool. if you have a branch hanging somewhere, I could rebase the PCIe driver on top.
<j_ey>
maz: there's been nothing major recently. when I push it out I will make a squashed branch (because it's like 40 commits currently)
<kettenis>
maz: does that mean I should add that Acked-by: line to all the commit messages in the series before resending?
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<maz>
kettenis: yup, that's the idea.
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<maz>
(matrix invasion)
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<maz>
j_ey: OK. if you Cc me on your series, I'll try and pull all the strings together.
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<j_ey>
maz: will do, I'll CC all the usual suspects
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<kettenis>
maz: cool (just to be clear I'll retain the msi-parent, I think it is best to be explicit even though I may have to change the OpenBSD code in the future to handle an implicit MSI parent node)
<maz>
kettenis: works for me.
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<marcan>
alyssa: well now you have me making major changes to the entire exception handling in m1n1 :p
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<alyssa>
marcan: ...oops?
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<sven>
maz: i think the correct fix is to just drop the iommu_flush_ops completely. this may also have to go into one of the next rcs because it might be possible to hit this even without pci support
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<marcan>
alyssa: still no idea *why* you got that SError, but at least now it should be handled properly
<marcan>
(pushed)
<marcan>
how are you getting it?
<marcan>
povik: nice job on the audio :)
<marcan>
alyssa: also you can try hv.trace_range(irange(0x24246b000, 0x24246b004)) before start if you're still getting the same fault; that should at least make it precise (i.e. you actually get the faulting instruction in the guest)
<marcan>
(without something like that, SErrors are asynchronous)
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<povik>
marcan: enabled by no small part by your tools
<marcan>
:)
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<maz>
sven: don't we need this invalidation anyway? it would feel odd to keep TLBs around when we've dropped the PTs. agreed on the need for something to go upstream as a fix.
<sven>
the invalidation already happens with apple_dart_iotlb_sync and apple_dart_iotlb_sync_map which is called by iommu_map/unmap.
<sven>
right now it would happen twice if those two functions weren't completely broken due to the wrong cookie that gets passed
<maz>
sven: ah, gotcha.
<sven>
yeah.. it's essentially a left-over from v1 when i didn't yet understand the entire iommu api :(
<maz>
well, I think there are about 4 of you now.
<j_ey>
it certainly seems that way sometimes
<j_ey>
when i plug my laptop in, with the lid closed it makes a bong, I guess that's the smc?
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<marcan>
j_ey: AOP maybe
<marcan>
or just the main OS waking up
<j_ey>
marcan: I get a 'Guest exception: EXCEPTION_LOWER/SYNC' on asahi/pmgr/dev
<j_ey>
I think it's from a WARN/BUG
<marcan>
is it a brk?
<marcan>
if so it's a panic I think
<j_ey>
yeah it's the brk 0x800
<j_ey>
(I've never gotten `bt` to work in m1n1..)
<marcan>
it has to do with kernel configs
<marcan>
no messages before that?
<j_ey>
# CONFIG_RANDOMIZE_BASE is not set, not sure if I need anything else unset
<j_ey>
no messages
<marcan>
CONFIG_ARM64_PTR_AUTH=n if you don't want to set the pac_base by hand. I should really automate that...
<marcan>
*pac_mask
<marcan>
though actually I have that set and it works fine
<marcan>
j_ey: did you load_system_map()?
<j_ey>
rebuilding with ptr auth off, I dont need it
<j_ey>
yeah
<marcan>
what does bt look like?
<j_ey>
- 0xffffffc01043b48c (_end+0x3fbfff78b48c)
<j_ey>
- 0xffffffc0105efab8 (_end+0x3fbfff93fab8)
<j_ey>
etc
<marcan>
ah yeah, did you have CONFIG_ARM64_PTR_AUTH_KERNEL on?
<j_ey>
yes PTR_AUTH and PTR_AUTH_KERNEL=y
<marcan>
hm
<j_ey>
I think it was just the default
<j_ey>
(but I disabled them both now)
<marcan>
yeah but it works for me with both of those set
<marcan>
j_ey: ah, is this a 4K or 16K kernel?
<j_ey>
16K
<j_ey>
with 47-bit VA
<marcan>
that's why, I was on 4K
<marcan>
anyway, let me fix this
<j_ey>
Im using 16K because it doesn't get as much testing!
<j_ey>
marcan: you might fix this before recompiling the kernel finishes zzZZzz
<j_ey>
kettenis: the irqs are working, i can hit keys and see 'corrupted spi packet'!
<marcan>
j_ey: getting the feeling it's refclk after all
<marcan>
try that
<marcan>
apple only lists the 200MHz clock for spi, but that might be a device clock or something, and then the IO clock is still refclk...
<j_ey>
ok, I didnt retry that after fixing the power issues
<j_ey>
at least in the old way, I think refclk was the topmost level of the chain of clocks, so it makes snese maybe
<marcan>
yeah, the old way had refclk trickle down to everything
<marcan>
and I just checked and the driver does use the clock
<marcan>
so it would've ended up with refclk
<j_ey>
yup, that works!
<kettenis>
correlium defenitely assumes spi is using a 24
<kettenis>
MHz clock
* j_ey
removes always-on
<marcan>
it's probably correct
<marcan>
we've well established by now that the ADT is a giant mess and doesn't describe the hardware even remotely consistently
<j_ey>
always-on isn't needed either
<j_ey>
marcan: thanks for all the quick fixes today!
<marcan>
j_ey: btw, I bet the spi has a selectable clock like the uart does
<marcan>
(where it's either the fixed 24M clock or the configurable one, except for the UART that one is configured to 24M anyway)
<marcan>
you could try poking bits in the control register to see if you can find a clock select where it suddenly works at 200MHz instead :p
<j_ey>
marcan: can you get the data for spi3? what you pasted was spi1, want to make sure it's the same
<marcan>
ah, I don't have spi3 because I'm on a mac mini :)
<j_ey>
oh right
<marcan>
you can run dump_pmgr.py yourself though!
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<j_ey>
I'll try that in a bit
<marcan>
knowing how the uart block works, that "REG_CONFIG_PIOEN" looks more like IRQ enabled? it's the same bit as the IRQ mode on the samsung spi (S3C2410_SPCON_SMOD_INT)
<marcan>
I wonder if CPHA/CPOL and some of the others are the same as that samsung
<marcan>
I should spend some time poking at spi after I tear down this thing...