ChanServ changed the topic of #dri-devel to: <ajax> nothing involved with X should ever be unable to find a bar
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<YuGiOhJCJ>
anholt_, indeed the xorg server version 8d4be7f6c4f7c673d7ec1a6bfdef944907a3916e is from 2019 whereas the xorg server version installed on my computer is from 2017, so my xorg server is looking for the old "i965" driver instead of the new "iris" driver, so I have the choice between upgrade the xorg server or using an environment variable to force the driver (it seems that MESA_LOADER_DRIVER_OVERRIDE can do the job is I assign "iris" to
<YuGiOhJCJ>
it), https://docs.mesa3d.org/envvars.html I will try environment variables first, then if it does not work I will upgrade xorg server to the latest version
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<jenatali>
Woo the MRs I tried to merge 12 hours ago finally merged lol
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<airlied>
g0b: oh maybe it did some stuff with a frag shader in a special mode, but it was too limited for GL to use
<g0b>
it seems to have an actual CS shader mode from what i read
<g0b>
maybe it's more limiting ?
<g0b>
surely if it ran CL 1.1 it could do GL comp shaders in theory ?
<g0b>
this early vliw5 hardware is completely insane either way to me, the only reason I care is some kind of morbid fascination :D
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<tzimmermann>
javierm, hi! i wanted to ask, if you could backport the sysfb_disable patches to drm-fixes? as they fix the problem on jfalempe's computer, we should probably send them anyway, no matter what linus' results are
<g0b>
though if someone is serious about doing r600v (or should it rather be r700v ?) i'd like to see if I can jump on that train and tag along, i have some compiler background and some hw
<g0b>
+ khr member through work, yay
<javierm>
tzimmermann: sure! let me do that now
<tzimmermann>
thank you
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<javierm>
tzimmermann: you say drm-fixes but I should pushed it through drm-misc-fixes right?
<javierm>
and then you folks will send a PR to land in drm-fixes ?
<javierm>
tzimmermann: no worries, just making sure I got it correctly
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<linkmauve>
Hi, I’ve built Mesa without any kind of swrast, but according to eglinfo it still exposes EGL_MESA_device_software, which then fails to load /usr/lib/dri/swrast_dri.so
<linkmauve>
Would it make sense to stop advertising that one?
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<linkmauve>
Ah, I see it is hardcoded for now.
<emersion>
it would make sense to not expose it if we don't have it, but the loader can't do that with the current architecture
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<emersion>
there is a MR to change that architecture
<jenatali>
I'd also like to stop exposing that extension if the device is a layered device, e.g. the d3d12 driver that piggybacks on swrast for getting contents to screen, but that looked hard when I first looked at it
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<agd5f>
g0b, it was just a special version of the VS IIRC
<agd5f>
there is no separate compute shader until evergreen
<g0b>
evergreen docs mention they added the ability to do workgroup syncs
<g0b>
in CS mode
<agd5f>
g0b, evergreen had dedicated dispatch packets and SPI scheduling for CS. R7xx you basically had a special bypass mode in the front end which would limit the gfx pipeline, but it was still a draw
<g0b>
is that discussed in the ISA documents ?
<agd5f>
no. you need to set some state in the VGT or IA IIRC
<g0b>
or just institutional knowledge
<g0b>
so to speak
<agd5f>
I don't think the CS mentioned in the r7xx ISA doc is accurate
<g0b>
from what i'm seeing that must have been a pretty heroic implem work
<graphitemaster>
people just need to call it resizable bar and stop having vendor-specific names that make it sound like people are working together
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<g0b>
it's just resizable BAR right ?
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<pixelcluster>
the article makes it seem like intel themselves said they already suppot reBAR, but will add SAM later????
<pixelcluster>
afaik yes it is just AMDs name of resizable BAR
<pixelcluster>
aah
<agd5f>
well, windows complicates things a bit. Linux has supported resizeable BAR for a while. For windows, we implemented BAR resizing in the sbios to it happens before the OS loads
<pixelcluster>
no the reporters were confused, I think
<pixelcluster>
Intels terminology was fine, they said: "We are supporting Intel platforms with resizable BAR and will add support for AMD platforms with Smart Access Memory as Intel Arc graphics cards become available for sale as components."
<graphitemaster>
It's needlessly confusing
<pixelcluster>
I guess that made it seem like they're two different products or whatever
<agd5f>
well, the sbios needs to know what devices to resize the BAR on. I don't know what the logic looks like off hand.
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<graphitemaster>
Maybe Intel envisions some ARC GPU and AMD CPU combo chip on a laptop XD
<g0b>
"It's needlessly confusing" welcome to gpus :P
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<jekstrand>
bbrezillon, zmike: The only things still needing review on !17286 are panvk and lavapipe.
<jekstrand>
zmike: I dropped the "Draft:"
<zmike>
I saw
<zmike>
I'm running the MR through cts locally
<jekstrand>
:+1:
<zmike>
you've got a minimum of 1.5 hours until I can comment further
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<jekstrand>
lol
<jekstrand>
I can run the CTS here in 45 min
<jekstrand>
Or are you running the "OMG ALL THE TESTS"?
<jenatali>
jekstrand: I thought bbrezillon already gave you an r-b for panvk?
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<Sachiel>
coverage is bad enough when running OMG ALL THE TESTS and you are skipping some of them?
<Sachiel>
no wonder nothing works...
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<jekstrand>
jenatali: Yeah, I just didn't see it before pinging. (-:
<jekstrand>
Sachiel: zmike's definition of "CTS" also includes GL and GLES CTS via Zink. Aparently, he thinks Zink is required for conformance these days. (-:
<zmike>
actually I was just gonna run vkcts
<Sachiel>
oh, right, I keep forgetting he's insane
<zmike>
happily, ci will already run all the gl parts for me
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<jenatali>
Or is it just a "wait for the next meeting for people to talk about it" situation?
<jekstrand>
jenatali: If kusma can drop the WIP today, it'll probably go out tomorrow
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<jenatali>
Ack - he's on vacation I believe so not sure that'll happen today :)
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<robclark>
danvet: random crazy thought.. we could do some fun things if we had a way to get a dma-buf + offset from a dma-fence context (like push waits to cmdstream for cross-driver fences.. or mirror a fence timeline btwn vm guest and host)
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* jekstrand
starts madly copying+pasting from RADV
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<anholt_>
heads up, i'm working on the deqp uprev
<zmike>
uh oh
<danvet>
robclark, we had that, no one did anything with it
<danvet>
since no one used it kinda important stuff like cross-driver reset wasn't solved
<danvet>
probably when force-completing them in the reset code we also need to make sure to update the seqno
<danvet>
but yeah, the idea is about 8 or so years old, counting from 606b23ad609c71cfb37eeb972ea4c901034edd3c when mlankhorst merged it
<robclark>
maybe just before it's time ;-)
<robclark>
I don't actually have a use for it yet.. but kinda seeing where mirroring a fence timeline between guest/host can be interesting (although would need some way for signal notification)
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<zmike>
dcbaker: can't stop won't stop!
<anholt_>
known issue: fd.o is out of space on minio-packet currently and throwing errors. should be resolved soon.
<dcbaker>
lol
<dcbaker>
zmike: I'll have some patches for you to decide if you want to backport, but I haven't done the pull for today yet, so I'll let you know after that
<zmike>
👍
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<zmike>
dcbaker: btw I don't suppose there has been any movement in meson about the permissions thing? e.g., while doing git rebases and rebuilding between commits suddenly I don't have write permission to my build directory
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<dcbaker>
zmike: I think I've forgotten about it…
<zmike>
:(
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<airlied>
zmike: do you use sudo to install?
<zmike>
this is without any installing
<zmike>
just building
<airlied>
oh wierd
<zmike>
yeah
* airlied
sees it where I've sudo installed and it's built something first
<airlied>
I've got a chown -R in my history :-P
<zmike>
yuuuuuuup
<zmike>
I have a script that will incrementally rebuild every commit in a MR, it doesn't do any install or sudo, and it will frequently error because permissions have changed
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<kusma>
jekstrand: Fixed.
<jenatali>
\o/
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<mlankhorst>
robclark: I used it to test fence implementation with nouveau and i915
<mlankhorst>
so it does work
<mlankhorst>
robclark: maybe dma-buf + offset for the implementation, going full circle. ;)
<robclark>
I have some test code which does something similar with a userspace signaled "fence".. but yeah, I was thinking less in terms of a special kind of fence and more an optional dma-fence op
<robclark>
(but haven't really thought much about fctx lifetime.. ie. you don't want to re-import on every frame)
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<X512>
What are the benefits of resizeable BAR?
<jekstrand>
You can map more VRAM
<X512>
Access to VRAM from CPU is slow.
<pixelcluster>
write isn't that slow
<jekstrand>
Also, shuffling memory back-and-forth to the BAR so you can access it from the CPU is slow.
<pixelcluster>
it's especially beneficial for something like games where you want to stream huge amounts of data in and out
<X512>
Why not use GPU DMA?
<jekstrand>
Use GPU DMA for what?
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<X512>
To copy memory contents between CPU RAM and VRAM.
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<jekstrand>
If you're writing from the CPU, that's often slower than a write-combine map
<airlied>
and can crap on your cpu cache
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<HdkR>
Just make sure to use the singular streaming write that x86 has ;)
<X512>
Is that singular streaming faster then GPU DMA (copy from CPU RAM to VRAM by GPU)?
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<HdkR>
Nah, that one was a joke for not polluting CPU caches. You want to take advantage of WC so PCIe bursts work well
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<X512>
Considering that major GPU vendors did not implement BAR resize for a long time, it seems not really importent.
<jekstrand>
Considering that they did implement it, it probably is. :)
<jekstrand>
You don't do things that require major cross-industry collaboration as a science fair project.
<X512>
Does WC solve problem of terrible VRAM read speed?
<jekstrand>
no
<X512>
Then what the point?
<jekstrand>
write speed
<jekstrand>
That's all that matters for graphics
<X512>
memcpy will spend CPU cycles, but GPU DMA will not.
<jekstrand>
How fast can you shove commands and new textures to the GPU
<jenatali>
The problem is that without resizable BAR you're still doing a memcpy to a location that you'll tell the GPU DMA to read from
<jekstrand>
Not everything is just lying around in a format the GPU can already use so you usually have to do some CPU work anyway. May as well do that work straight into VRAM.
<jenatali>
Yeah, exactly
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<X512>
Why doing memcpy before GPU DMA? Assembling some parts of final buffer from different locations?
<pixelcluster>
decompression for example
<pixelcluster>
in case of games you won't store your assets uncompressed
<airlied>
yeah esp copying to somewhere that then has to have the complete cache flushed
<airlied>
or is coherent, so probably WC writes anyway
<X512>
Decompression can be done directly to GTT buffer.
<airlied>
but also directly to VRAM
<pixelcluster>
you don't want to have all your assets in GTT
<pixelcluster>
so if you don't write to VRAM directly you'll have to somehow copy it afterwards
<X512>
Isn't decompression need reading final buffer?
<airlied>
but there are plenty of benchmarks that show the BAR resize, the main block on implementing it was Windows support for it I think
<pixelcluster>
no, decompression doesn't need to read from the decompressed data
<airlied>
since 64-bit bars weren't a new thing
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<airlied>
but I think 32-bit OSes would have caused problems
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<jenatali>
Windows has supported it since Win10 (2015)
<X512>
So the use case is uploading decompressed data to GPU?
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<jekstrand>
Really uploading data in general
<jekstrand>
decompression is just one example of the CPU work that has to happen on the front-end
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<X512>
For Vulkan BAR resize feature seems need detection by application to decide use staging buffer or not.
<jekstrand>
Likely, it'll get exposed as changes to the memory heaps/types
<jekstrand>
You'll be allowed more mappable VRAM
<airlied>
quite often you have to tile on upload as well anyways
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<bl4ckb0ne>
is it normal for a i7 7xxx to not support glsl 1.40 with mesa 18? opengl is stuck at 3.0
<airlied>
mesa 18 is a few years old
<airlied>
but also that sounds like a GL compat context
<airlied>
so yes
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<kisak>
mesa/iris has higher compat context support.
<bl4ckb0ne>
the joys of debian eh
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<dcbaker>
zmike: I've got a few patches for you to look at :)
<dcbaker>
336b5c8823 zink: fix dynamic stride conditional in pipeline
<dcbaker>
b240be28e3 zink: check for pending clears to determine write
<dcbaker>
e38b2adb88 zink: use the bigger of the variable type and ...
<dcbaker>
a530b90cd3 zink: remove swizzle from fbfetch lowering
<zmike>
dcbaker: which branch?
<dcbaker>
22.1
<dcbaker>
or staging/22.1
<zmike>
ok, will check in an hour or so
<dcbaker>
zmike: no hurry, you've got 2 weeks :)
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<bluestang2006>
test
<bluestang2006>
hello, I'm looking for some help with d3d12 and vaapi decode under WSL...I have OGL apps working (glxgears, gputest/furmark) with d3d12 but vaapi is not working for me