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<bnieuwenhuizen> karolherbst: on AMD we have the same limitation (max 65535 workgroups in any dimension) and it is not the driver but either firmware or hardware
<karolherbst> uhhh
<karolherbst> that's quite small
<karolherbst> anyway.. I'll wire up last_block so it's not all that terrible
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<karolherbst> ehhh.. lowering big grids is annoying :')
<jenatali> Yep
<karolherbst> but I guess the only sane way out is really to just waste another ubo
<karolherbst> now that I use them for anything atm...
<karolherbst> *not
<jenatali> Or append it to the kernel args
<karolherbst> I mean... atm it's a kernel arg
<karolherbst> I could potentially mess with the existing input buffer and just reupload it all the time, which is fine
<karolherbst> just would have to store the location of the offsets...
<karolherbst> though that's fine I guess
<karolherbst> yeah.. actually
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<karolherbst> okay.. seems like patching the input buffer ain't that problematic afterall
<karolherbst> and I guess if you hit the grid limit, perf of reuploading the entire thing might not even matter
<jenatali> Heh, probably not
<jenatali> Maybe I should see about merging mine... at some point
* jenatali wishes I had more time for these kinds of things
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<karolherbst> might make probably more sense to use a real bo for the kernel input as well instead of reuploading the entire thing, but it's also so small that it probably fits into the command buffer anyway...
<karolherbst> :D
<karolherbst> anyway.. now I only have to actually implement the lowering
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<tzimmermann> mlankhorst, the current PR for drm-misc-next will be the final one for this cycle?
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<tzimmermann> javierm, the nomodeset patches break some builds. if you have a second, can you please r-b the patch at https://lore.kernel.org/dri-devel/20221117114729.7570-1-tzimmermann@suse.de/T/#u ? trivial
<javierm> tzimmermann: r-b from me
<javierm> yeah, I saw the emails from the robot about it
<tzimmermann> thanks
<javierm> tzimmermann: yw
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<karolherbst> jenatali: ehh.. get_global_linear_id is broken with big grid lowering :( I guess you are treating the lowered offsets differently?
<jenatali> I added a system value and a nir option for it
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<jenatali> You even reviewed it ;)
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<karolherbst> ehhhhh I remember
* karolherbst wants to ignore this problem for longer
<jenatali> What're you running into that's trying to do a large dispatch?
<karolherbst> I don't do last_block stuff
<jenatali> I don't remember that being hit by the CTS but maybe they added it
<karolherbst> so just super cursed grid sizes
<karolherbst> also.. iris limits grid size limits are 16 bit
<jenatali> last_block? Is that nonuniform grid sizes?
<karolherbst> uhm.. maybe?
<karolherbst> block = [2, 1, 1], grid = [174763, 1, 1]
<karolherbst> and I want to turn that into
<karolherbst> block = [1024, 1, 1] last_block = [342, 0, 0] grid = [342, 1, 1]
<karolherbst> atm.. I don't
<karolherbst> some optimizations relied on the work group size to not exceed 16 bits, so things broke
<karolherbst> but besides radeonsi no driver actually supports last_block
<karolherbst> it's for the case where local size is all 0
<karolherbst> anyway.. for drivers not supporting last_block, I could also lower this with an offseted last block, but... then I run into the offset issue again
<jenatali> Oh I see it's a gallium concept
<karolherbst> yeah.. though I think it maps to some hardware
<karolherbst> in nvidia we also have a "CTA_RASTER_WIDTH_RESUME" field which I think is exactly that
<karolherbst> but would hav eto play around with it
<jenatali> Yeah for those weird grid sizes I just pick a terrible local size and keep all groups the same
<karolherbst> yeah.. that's what I'm doing
<jenatali> But maybe splitting a last group would be better
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<karolherbst> but having a width of 349526 doesn't work too well if the grid limit is 65535
<karolherbst> yeah
<karolherbst> it is
<jenatali> Especially if the terrible local size means I already have to split the groups...
<karolherbst> it's super simple
<karolherbst> just that offset stuff is annoying
<karolherbst> if the hw doens't support it
<jenatali> And then there's a CL optional feature that you can support
<karolherbst> ehh wiat
<karolherbst> optimize_local_size is my function to optimize block/grid
<jenatali> FWIW D3D doesn't have such a concept so my "hardware" doesn't support it lol
<karolherbst> :(
<karolherbst> maybe the last part I removed there with the subgroup thing is something you could easily add
<karolherbst> not sure how much that helps tho
<karolherbst> it's still not perfect
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<MayeulC> Venemo: soo, you suggested me to ping you regarding sparse support in fiji, which actually passes the CTS on my GPU without obvious failures or hangs. https://gitlab.freedesktop.org/mesa/mesa/-/issues/4136#note_1638724
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<danvet> emersion, I didn't miss the doc patch we discussed yesterday? or whatever it was, I forgot already :-/
<emersion> ah, no, i didn't do that one, because i'm not sure it's such a great idea
<emersion> hm, ATOMIC=2 iirc
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<jenatali> Given that a bunch of the Mesa tree has dropped the need for adding r-b/a-b tags to commits, since part-of gets added and people can see who was involved from the MRs... is there a timeframe when people would consider adopting that for the whole tree?
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<alyssa> anholt: Playing with piglit-runner, so far works great, thank you! :-D
<alyssa> one small question: I see it spawning piles of windows in my Wayland session, any good way to make it not do that?
<alyssa> I guess PIGLIT_PLATFORM=gbm ? or is there something better?
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<emersion> a workaround would be to start a headless wayland compositor to make it happy
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<emersion> (if you're running a wlroots compositor: WLR_BACKENDS=headless sway; WAYLAND_DISPLAY=wayland-2 piglit)
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<alyssa> emersion: I am using a wlroots compositor indeed ;)
<alyssa> thanks :)
<daniels> or weston -Bheadless-backend.so -Spiglit & WAYLAND_DISPLAY=piglit piglit-runner ...
<MrCooper> or mutter --headless piglit-runner ...
<daniels> gotta collect 'em all
<MrCooper> hehe, actually need -- before piglit-runner if there are parameters after it
<daniels> emersion: ooi, how often does your headless backend tick frame events?
<emersion> daniels: configurable, but the default is 60Hz (goes idle when nothing changed)
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<daniels> emersion: yeah nice; I discovered the other week that our test suite runs much faster if you make it tick infinitely fast :P
<emersion> ahah
<daniels> (any screenshot tests will trigger a no-planes repaint and do glReadPixels as it does so, but if that repaint doesn't happen for another 15ms ...)
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<Venemo> MayeulC: great, thanks. I will try to re-test on my own Fiji soon
<Venemo> MayeulC: currently my testing machine is otherwise indisposed but I think I can test sparse on Fiji with it next week
<MayeulC> Venemo: Thank you :)
<MayeulC> It would be a shame to prevent Fiji users to use that feature, although ideally the issue would need to be bissected. I hope you won't have any hangs
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<Venemo> MayeulC: it is the strangest thing. with sparse enabled it would simply reboot during the test run
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<Venemo> it's an R9 Nano, I understand yours is the Fury right? so should be the same chip but in a different SKU as far as I understand
<MayeulC> That's it. There's also the Fury X, but I think this one is just binned differently. It used to be possible to change the BIOS of some manufacturers to unlock some extra cores since they didn't blow efuses (assuming no hw defect), but I haven't tried that on mine :)
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<Venemo> me neither, but I got it used, so who knows what they did to the poor thing before I got it
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<MayeulC> Exactly the same here. That's also why I didn't pursue the hard lockups I used to get (and probably still do) in Risk of Rain 2 further: https://gitlab.freedesktop.org/mesa/mesa/-/issues/864
<MayeulC> That was also quite weird. My computer just completely locked up, and the only way to recover was to power cycle it by holding the power button or disconnecting the power supply.
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<MayeulC> (I also had those issues in a few other games, I recall Rise: Son of rome, and No Man's Sky out of my head, so I started thinking that was a hw issue)
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<Venemo> that's not really weird, it's a normal GPU hang
<Venemo> I recommend filing a new issue report about that. if it can be consistently reproduced, should be easy to fix
<Venemo> if it's "random" then that can be very difficult
<MayeulC> Oh, I thought GPU hangs would not prevent the CPU from writing logs, or prevent me from sshing in.
<MayeulC> I could pretty consistently reproduce it, but I was unable to collect any logs or apitrace
<Venemo> it depends. sometimes the kernel hangs too
<MayeulC> Hmm, then how do you go about debugging that? Collect a trace on another device and replay it on the faulty one?
<Venemo> it can happen with any driver for any piece of HW. few yrs ago I had a wifi driver which would freeze the machine completely when the AP sent a bandwidth change packet or something like that
<Venemo> I recommend to try the usual steps we recommend for hang debugging.
<Venemo> tho, if the machine freezes completely that may be ineffective
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<MayeulC> That wifi issue sounds like a serious DOS vector... I tried setting multiple environment variables for hang detection, but it didn't prevent freezes.
<Venemo> it won't prevent them, it will help diagnose them
<Venemo> if you can't get any logs at all, then you can still try serial port based debugging, ie. you can connect a serial port and have the kernel send out the log on that. it's somewhat tedious but that's how I realized that the wifi driver was to blame
<MayeulC> Well, I had nothing got persisted to disk either, so no logs, and no blinking lights either, unlike with regular panics
<Venemo> ok, that's pretty bad indeed
<Venemo> I can test the game for you on my Fiji if it's not too difficult to obtain that game
<Venemo> but probably only next week or later
<Venemo> I also don't have the serial ports at hand currently.
<MayeulC> I should try with serial, but given the absence of blinking light I thought my chances were pretty low.
<MayeulC> Once finish writing my PhD, I should have more time and I'll try to find a reproducer easier than "40 minutes ingame, if by chance the seed loads the problematic zone". RISE used to be easier (I had a problematic save), but I need to check if it still hangs.
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<Venemo> "40 minutes ingame" sounds like a random one
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<anholt> DavidHeidelberg[m]: so, ci_run_n_monitor.py doesn't seem to start jobs unless the pipeline is in a merge request. any idea what's up with that?
<DavidHeidelberg[m]> anholt: that's weird. I using it without merge requests. It just dots ....... ?
<anholt> I get "Detected job dependencies: a618_vk 1/9: debian/x86_build-base debian/x86_build debian/arm_build kernel+rootfs_arm64 debian-arm64" then " Duration of script execution: 0.1 minutes"
<daniels> usually people complain that CI is too slow
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* anholt starts jobs manuall
<DavidHeidelberg[m]> anholt: the job is defined correctly, maybe random failure? (Retry pipeline in top right corner and run script again?)
<anholt> I had mistyped a job name first so everything was cancelled, perhaps the script doesn't recover starting of cancelled jobs?
<DavidHeidelberg[m]> anholt: yeah, then it fails
<DavidHeidelberg[m]> You have to Cancel the pipeline and retry it. The script cannot recover.
<daniels> DavidHeidelberg[m]: can we make it retry cancelled jobs?
<anholt> why should manual intervention be necessary?
<DavidHeidelberg[m]> if you make typo, it'll break the Gitlab CI a bit, because it disable all jobs
<DavidHeidelberg[m]> then if you enable them manually, they don't hold dependencies
<DavidHeidelberg[m]> which leads into Gitlab starting jobs, which doesn't have needed dependencies finished
<DavidHeidelberg[m]> so only solution would be implement something like --reset-pipeline option, which would do "Cancel pipeline" and "Retry" button ''press''..
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<jekstrand> How afraid of vectors should I be for SSA RA?
<bnieuwenhuizen> decently afraid
<jekstrand> Ok
<bnieuwenhuizen> cwabbott might have some good stuff though
<bnieuwenhuizen> basically a bunch of heuristics around creating split/merge affinity group like things
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<daniels> DavidHeidelberg[m]: can we make it print an error when the jobs don’t start?
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<mhenning> jekstrand: colombet's thesis talks about handling some of those types of ra constraints in a decoupled allocator https://tel.archives-ouvertes.fr/tel-00764405/file/COLOMBET_Quentin_2012_These.pdf
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<mhenning> (I don't know if that's what people actually use though or if they just split live ranges)
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<cwabbott> from a quick scan, aco and ir3 both use a bit more advanced version of the tree-scan algorithm in that paper
<cwabbott> rather than forcing it back to the "global color" at the end of the basic block, we record the variables with a color other than the global color and insert fixups only when colors differ along an edge
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<cwabbott> (aco keeps SSA around after RA and inserts phi nodes, for ir3 I decided to insert parallel copies for phi nodes before RA and not stay in SSA afterwards so it just adds to the parallel copies)
<cwabbott> that gets tricky when there are loops involved
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<DavidHeidelberg[m]> daniels: that's a good question. I'll look into it, maybe if the number of target jobs is empty list we can error out or something
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<daniels> DavidHeidelberg[m]: yeah, or if the jobs we try to start don’t actually start?
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<DavidHeidelberg[m]> daniels: I tried to keep the logic simple, but I'll look what can be done to make it more robust
<Prf_Jakob> DavidHeidelberg[m]: May I ask how you registered/identified with a matrix client on OFTC?
<DavidHeidelberg[m]> Prf_Jakob: there is description on matrix org wiki pages ;) (sorry I'm on a phone)
<Prf_Jakob> DavidHeidelberg[m]: Thanks, will take a look.
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<Prf_Jakob> I was afraid of that
<Prf_Jakob> Wronge chat :p
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<ubitux> hi; I switched from an intel egpu to a dedicated radeon and the colors feels off, as if a filmic curve filter was applied to them; it's somehow darker and more contrasty
<ubitux> any idea what could cause that?
<ubitux> it's subtle but noticeable
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<Lynne> are you on HDMI? could be a color range issue
<Lynne> otherwise, maybe your compositor/DE is messing with your display gamma curves
<ubitux> I'm using DP; I have no compositor/DE, i3/X11, my setup didn't change
<Lynne> your display decided to switch modes or reset its own curves?
<ubitux> nah the settings were preserved afaict; it's a dumb dell 1080p, nothing fancy
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<blazingsun> auwooo or skraito here how life been here l33t h4x0r 31337
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<jenatali> Ugh CI flakes have gotten pretty bad recently
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<DemiMarie> What do OpenGL and Vulkan say about a buffer being modified while it is in use? Does it cause full-on undefined behavior (anything can happen) or will it just result in corrupted pixels on the screen?
<DemiMarie> If it is undefined behavior, then compositors will need to perform a defensive copy of all client-supplied buffers, at a potentially substantial performance penalty.
<DemiMarie> Malicious sandboxed clients are allowed to cause themselves to be misrendered, but not to corrupt compositor memory or interfere with the display of other clients.
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<DemiMarie> On the other hand, if Mesa can guarantee that a client that does this will only hurt itself, then the copy can be avoided. However, this guarantee must apply to all backends, including llvmpipe/lavapipe.
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<alyssa> Implementing batch tracking on Asahi
<alyssa> enabling gallium_hud is causing quake3 to flip upside down
<alyssa> such a classic
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<anholt> ugh. sway refuses to run as root. guess dump it for CI and try using weston headless.
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<emersion> anholt: yeah, artifact from the suid-root days. next sway release will accept