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<cmarcelo> anyone that knows / maintains margebot: wondering if I just put marge in an odd state by pushing on an MR that marge pushed to.
<cmarcelo> (is there a "marge log" somewhere I can peek at in those cases?)
<airlied> cmarcelo: what it processing that MR?
<airlied> if so you should unassign it, and kill any pipelines it was running
<cmarcelo> oh, I missed canceling the pipeline (it was already failing)
<airlied> yeah I think if it get cancelled, marge might wake up before the 1hr expiry
<airlied> though it may not
<cmarcelo> it did wake up
<cmarcelo> thanks
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<memleak> Hey I was debugging PREEMPT_RT latency spikes with amdgpu and radeon DRM drivers, I finally have a consistent stack trace now which is exceeding 30-50 microseconds (occasionally even spikes to above 200 microseconds)
<memleak> I discovered a tool called timerlat and it's been a huge help. trace: https://dpaste.com/42WHYK5EQ
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<memleak> With `nomodeset` the spikes go away, radeon_ib_schedule radeon_cs_ib_vm_chunk and/or radeon_cs_ioctl must be the culprit
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<memleak> 6.5.2 is my kernel version
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<memleak> dpaste.com is acting up, new link: https://dpaste.org/G3y6y
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<airlied> memleak: might be worth trying the amdgpu driver instead of radeon, though it might end being the same or worse
<airlied> that radeon trace shows it latency when it interacts with the hw interface
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<airlied> which is kinda hard to avoid
<airlied> cik_gfx_set_wptr
<airlied> is mostly just a register write
<memleak> I'll get a stack trace with amdgpu one sec
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<memleak> new trace: https://dpaste.com/FZRVR327P
<airlied> okay so yes you are hitting a hw register and hw takes time to react
<memleak> ok :)
<airlied> not sure there's much can be done about it
<airlied> mmio register reads/writes can stall the cpu, don't think there's any nice way around it
<memleak> well hey! that at least solves the mystery!
<memleak> and it's not user error!
<memleak> Thank you! :D
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<memleak> hey airlied I just wanted to come back and say I'm sorry for possibly annoying the shit out of you years ago, I was really hyper, I talked too much and I was a handful for everybody.
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<memleak> I was in junior high when I first started dabbling with X.org, anyways, thank you for everything.
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<karolherbst> or rather ideas..
<karolherbst> apparnetly setting "V3D_DEBUG=" starts to trigger gpu memory faults
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<itoral> karolherbst: doesn't make any sense to me... if you don't V3D_DEBUG at all, don't you see any mem faults?
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<karolherbst> itoral: correct
<karolherbst> maybe something something VM placement or something
<karolherbst> I think the shader accesses OOB no matter what, but I'll debug more thouroughly today on what's going on here... I was able to get rid of that error by doubliing buffer sizes
<karolherbst> it's just _very_ confusing that setting that env var makes a difference :D
<karolherbst> the value of v3d_mesa_debug doesn't change, but I suspect something changes in that handling of that env var which changes something else? dunno.. it's just very odd :D
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<itoral> yeah, I think that what happens is that for some reason when the envvars are set some allocation patterns change and that makes some OOB accesses land into valid memory addresses
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<itoral> karolherbst: do these tests use global address intrinsics to read memory from a buffer that is then used to compute global addresses for other global reads/writes?
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<itoral> I ask because if that is not happening then you can do a simple trick to identify the bad access(es): you drop all global reads/writes from the kernel (for example by not emitting the global intrinsic from the compiler) and then start putting them back into the kernel one by one until you see the OOB error again
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<itoral> actually, you could also use this tactic even if you use the results from a read to compute the address for follow-up reads, since you are adding later global intrinsics progressively one by one
<itoral> one you know the first global intrinsic that causes the problem then we can just look at how the address is generated to figure out what is wrong
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<karolherbst> itoral: yeah, it's just one sized buffer bound and then read/write to
<karolherbst> the kernel is really trivial
<karolherbst> it's literaly this:
<karolherbst> int tid = get_global_id(0);
<karolherbst> dst[tid] = ((1<<16)+1);
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<karolherbst> I wonder if the test is slightly buggy... maybe I pass the buffer size into it and see what I can do with that
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<karolherbst> mhhhhh
<karolherbst> itoral: I think it has something to do with how the kernel is launched
<karolherbst> there is an OOB read and if I cap the tid to the buffer size it doesn't cause those
<karolherbst> _but_
<karolherbst> the kernel also launches threads according to the buffer size so that should be impossible
<karolherbst> however.. CL has a cursed feature.. :D printf
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<karolherbst> ahh I can't use it as it needs global atomics, which I haven't looked at yet
<karolherbst> huh....
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<karolherbst> itoral: mhhh... maybe it's also something to do with me overclocking the rpi with +400 MHz...
<karolherbst> let me try without it first
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<karolherbst> ahh no..
<karolherbst> ahh no..
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<karolherbst> but higher CPU load does make it more likely at least.. yeah so something odd is going on
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<karolherbst> I think the test is doing silly things...
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<glehmann> how do the fdot_replicated opcodes work? can they have any number of output components or does e.g. fdot4_replicated always have a 4 component output?
<itoral> overclocking should't really have any impact
<karolherbst> well.. I'm quite close to the point where increasing the clock a bit further causes the CPU to do wrong things :D
<karolherbst> I've configured it in a way to not increase the voltage over the limit
<karolherbst> but yeah.. the setting is fine it seems and never caused any problems
<karolherbst> it clearly reads OOB but I have no idea why...
<itoral> so capping the TID fixes the issue? mmm...
<karolherbst> ehh.. no
<karolherbst> I just got (un)lucky
<itoral> ah :)
<itoral> is that write to dst the only global address access in the kernel?
<karolherbst> now I'm running "stress -c8" int the background and things are a bit more interesting
<karolherbst> yes
<itoral> interesting, in that case the only way we can have an OOB is that tid is out of bounds.... have you tried making the dst buffer larger and write the tid into it?
<itoral> then inspect te buffer when you trigger the mem faults and check it the tids are sane
<itoral> I don't quite imagine why they wouldn't be, but something weird is happening so...
<karolherbst> maybe something with the shader?
<itoral> can you dump the kernel with V3D_DEBUG=cs?
<karolherbst> yeah... something is odd
<karolherbst> doing this instead makes the fault go away: if (&dst[tid] < 0x70000 || &dst[tid] >= 0x80000) dst[tid] = ((1<<16)+1);
<karolherbst> at least it seems that way
<karolherbst> itoral: the odd thing is, the test passes no matter what, so maybe it's just more threads running than expected? Anyway, will dump the plain shader
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<itoral> wht would that if fix anything? isn't dst bound to different addresses in various iterations? At least it looks like that from thaces you pasted
<karolherbst> yeah.. there are three pre allocated buffers in that test
<itoral> karolherbst: does v3d_csd_choose_workgroups_per_supergroup return a number other than 1?
<karolherbst> each 16384 elements big, once with int/int2/int4
<karolherbst> itoral: nah, that's always 1 it seems
<itoral> ok
<karolherbst> mhhh.. maybe I should add an option to disable that offset nonsense...
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<karolherbst> huh
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<itoral> karolherbst: what is the workgroup size and the dispatch size for that kernel?
<karolherbst> 256x64
<karolherbst> uhm.. 256 blocks and 64x1x1 block size
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<itoral> ok, thats within the limits
<itoral> I don't see anything obviously wrong with the shader, but I'll give it a deeper look tomorrow
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<karolherbst> huh!
<karolherbst> I think I know what's up....
<karolherbst> uhhhhhhhhhhhhhhhhhhhhh
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<itoral> karolherbst: before I go, I noticed this:
<itoral> con 32x2 %71 = load_const (0x00010001, 0x00010001) = (0.000000, 0.000000) = (65537, 65537)
<itoral> @store_global (%71 (0x10001, 0x10001), %70) (wrmask=xy, access=none, align_mul=8, align_offset=0)
<karolherbst> nah... it has nothing to do with that
<karolherbst> I think I found it
<itoral> ah, cool
<karolherbst> dst contains the address of the wrong buffer
<itoral> what is it?
<karolherbst> not sure why
<itoral> interesting
<karolherbst> but it points to the int buffer for the int2 run sometimes
<karolherbst> and then it accesses invalid memory
<itoral> uh
<karolherbst> the test all passes as it just reuses the buffers from the first run
<karolherbst> :D
<karolherbst> yeah.. probably something like that
<karolherbst> not quite sure, but maybe there is a sync issue with the ubo0 thing I'm using
<itoral> ok, at least now we know what to look for
<itoral> I gotta go now
<karolherbst> yeah...
<karolherbst> I hope I'll figure out what's wrong
<karolherbst> ohhh....
<karolherbst> duh
<karolherbst> it's a user const buffer at 0 :)
<karolherbst> and I suspect v3d doesn't copy it
<karolherbst> or something something
<karolherbst> I'll dig a bit deeper
<itoral> ok, I'll be back tomorrow if you don't find it
<itoral> good luck! :)
<karolherbst> yeah...
<karolherbst> thanks
<itoral> np
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<karolherbst> yeah... it's definetly that
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<karolherbst> or maybe not? uhhhh
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<MrCooper> daniels: FWIW, sending plain-text e-mails with Thunderbird works mostly fine for me (still on 102 though, since one extension I use doesn't support 115 yet); I disabled mailnews.send_plaintext_flowed and set mailnews.wraplength to 0
<austriancoder> what is the official definition of a nir system value?
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<mareko> austriancoder: a value that doesn't come from the user
<austriancoder> mareko: thanks
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<lina> DemiMarie & others: You might be interested in this ^^ https://www.youtube.com/shorts/ToulgVAofw8
<ccr> \o\
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<DemiMarie> lina: I will, though it will be 10PM my time then!
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<lina> Not sure how long it will be yet, but hopefully not 5 hours ^^
<airlied> if a stream is less than 5 hours is it really a stream :-P
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<Lynne> the amd dc code somehow got worse in 6.6-rc1
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<anholt__> eric_engestrom: looks like pipelines in forks are busted? https://gitlab.freedesktop.org/anholt/mesa/-/pipelines/984424
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<zf> hi! I'm encountering an assertion failure in Mesa, with radv, while trying to use a geometry shader that uses clip distances:
<zf> d3d10core\tests\x86_64-windows\d3d10core_test.exe: ../mesa/src/compiler/nir/nir_validate.c:1390: validate_var_decl: Assertion `glsl_type_is_array(type)' failed.
<zf> I hesitate to immediately file a bug, since this could be our bug, although the validation layers don't complain... but I'd appreciate if someone could give me some pointers where to look in the source?
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<zf> since I am wholly unfamiliar with nir
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<DemiMarie> zf: if the validation layers don’t complain and your program isn’t corrupting memory (use Address Sanitizer to check that), it’s a Mesa bug
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<DemiMarie> That error message means that Mesa is generating invalid IR; it’s the equivalent of an internal compiler error in GCC, Clang, or MSVC.
<zf> well, it could always be a bug in the validation layers, i.e. a missing validation
<DemiMarie> is your program open source?
<zf> but I can certainly file a mesa bug on the assumption that it's safe
<DemiMarie> yeah
<zf> yes, this is actually something we're running into in the Wine self test suite
<DemiMarie> Ah, so that is why you have Windows-style pathnames :)
<DemiMarie> If you have a small reproducer that should help the Mesa developers fix the issue.
<zf> yeah, that's... the hard part
<zf> it's Vulkan, so "small reproducer" isn't really a thing
<zf> and Wine is not exactly a lightweight piece of software
<zf> if this was GL, I could record an apitrace, but I guess no such thing exists for Vulkan
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<DemiMarie> It probably should
<Sachiel> gfxreconstruct exists
<Sachiel> you can go back a while and see if the same issue exists and if not, try bisecting
<DemiMarie> BTW geometry shaders are generally not very efficient, so if this shader comes from Wine then it is probably best to use something else
<zf> we're a translation layer, so we do need the geometry shaders :-)
<zf> thanks, I'll try gfxreconstruct
<zf> I don't see the issue with stock distribution Mesa, but I wouldn't be surprised if that's because it's built with NDEBUG
<DemiMarie> To quote the Arm Mali docs (or possibly an old version of them): “Most use-cases for Geometry shading are better handled by compute shaders.” and “Find a better solution to your problem. Geometry shaders are not your solution.”
<zf> trust me, I'm well aware of the problems with geometry shaders, but we don't really have a choice in the matter
<DemiMarie> It is actually possible to emulate geometry shaders using nothing but compute shaders.
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<DemiMarie> AGX will need to do that because Apple hardware doesn’t support geometry shaders at all.
<Sachiel> not being in control of either the source of the shaders nor the driver, it'd be a ton of work to probably get a ton of weird failure cases
<zf> and worse performance
<DemiMarie> That said, I understand you not wanting to take that route.
<DemiMarie> Probably
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