06:06 <junari> jernej: values that writing to mctl_ctl->mrctrl1 is dram_mr0-dram_mr3 from dram_para (for ddr3). This is one of the reasons why warpme's memory did not work.

10:26 <warpme> apritzel: returning a bit to non-working int.phy eth on h616/h313 with current u-boot: i started compare clocks (kernel clk summary) and indeed there is missing clock in non-working case https://paste.pics/1146db937dc3e1b9d2fe7dbbe58db02d (left is working; right is non-working). I don't know what will be better solution: enable it in u-boot or in kernel?

14:44 <apritzel> warpme_____: in the kernel, but I guess this is just the fallout of something else not working? If the MAC driver doesn't fully probe, then the clock would be disabled again

15:44 <warpme> apritzel : jernej just educated me int.phy is directly connected to ac200 and ac200 to operate needs clock. this clock is provided by pwm. So proper solution will be to add pwm, then ac200 then maybe eth on h313 starts to working. While this is most resonable approach - it will be also longest to get working eth on h313. As now we have _only_ Eth missing to have this box really usable as media player - I was hoping for quick win by

15:44 <warpme> reusing working h616 Eth hack on h313. But it looks it not works :-( I done test on h313 by using exact same kernel/uboot code from working h616 + just 2 rvbar/dram patches on h313. no Eth. argh...

16:33 <jkm> warpme: this is a bit off topic, but do you have plans to support Allwinner H3 with MiniMyth2?

16:51 <warpme_> jkm: MiniMyth2 runs MythTV and h3 imho is quite weak regarding gl (mali400 mp2). Mythtv Qt based gui will be unpleasantly slow on such weak gpu. By this I have no plans to go below H6. sorry!

16:52 <jkm> warpme: that's totally understandable

16:52 <jkm> I have NanoPI NEO Air covered with dust and just looking for a use case for it...

17:21 <apritzel> warpme: yes, proper mainline internal PHY support is a bit out, especially on the H616/313.

17:21 <apritzel> jernej's U-Boot hack^Wcode programs the PWM clock (in bypass mode), so that should work. But I need to check if the kernel now sabotages some of clock gates again

17:23 <apritzel> and I don't think the H616 is really different from the H313 in this regard (MAC+PHY), but there might be some board differences between the Tanix and the X96Q regarding Ethernet

20:26 <jernej> junari: not really, DRAM driver actually overwrites mr0 - mr3 values for LPDDR3 and DDR3 based on TPR2 parameter. You can see that in mctl_com_set_channel_timing() function in t507_boot0_sdcard.elf.

20:27 <jernej> but in this case dram parameters hold correct values. They didn't when I first wrote H616 driver and that was a bit confusing

21:35 <jkm> 4095