<Mangix> rsalvaterra: I'd replace the loop with a usleep_range or something
<Mangix> maybe usleep_range(60, 120);
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<gch981213> Mangix: Breed dropped overclocking in NAND variant likely because it's hard to read NAND flash before the RAM is ready. CPU clock in MT7621 is set by the same binary blob doing memory initialization.
<gch981213> Mangix: Or bootrom limitation? I forgot the exact reason but it has nothing to do with stability.
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<KGB-2> https://tests.reproducible-builds.org/openwrt/openwrt_bcm47xx.html has been updated. (100.0% images and 97.9% packages reproducible in our current test framework.)
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<f00b4r0> rsalvaterra: I would add a comment in the code to explain what the magic values are for. When this patch is moved around the associated commit message may get lost. Direct reading also saves time search git log :)
<gch981213> Shouldn't that loop be removed completely by compiler optimization?
<f00b4r0> gch981213: it is from -O2
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<rsalvaterra> Mangix: I'd actually sleep for 1 ms, for paranoia.
<rsalvaterra> So, usleep_range(1000, 2000);
<stintel> that's one way to break your hardware
<stintel> I'd say just get better hardware but probably you will be forced to do that soonish anyway
<rsalvaterra> stintel: It's a toy. :P
<rsalvaterra> I mean, my connection is just too fast for MT7621-based devices.
<stintel> first world problems ;)
<rsalvaterra> I'm not disagreeing. :P
<stintel> still waiting on TP-Link's filogic based wall plate AP :)
<rsalvaterra> Oh, speaking of which, ELFv2 ABI for ppc64 has been merged. Your M300 is gonna be happy with the next LTS. ;)
<rsalvaterra> I don't know if musl will play along, though.
<stintel> musl is already ELFv2 on ppc64
<stintel> regardless of endianness
<rsalvaterra> Big endian?
<rsalvaterra> Oh, nice!
<rsalvaterra> The kernel wasn't, though. :)
<stintel> you knew this already ;p
<rsalvaterra> Yep! :D
<stintel> hmmm maybe it's time to roll out of bed
<rsalvaterra> It's noon here. Pretty sure it's later there. :P
<rsalvaterra> Building… hopefully I didn't forget any #include…
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<Mangix> rsalvaterra: you run any benchmarks? :)
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<djfe> vdsl in vrx518 is broken for some devices at the moment. it's one of the new features in openwrt-23 (super vectoring profile 35b)
<djfe> reason being a silicon bug. the necessary patch/hack has been collecting dust since february
<djfe> I would appreciate it highly if someone could review it (robimarko asked for a second opinion on the matter
<djfe> we have numerous posts in the forum and atleast one github issue about this already, so the silicon bug is not uncommon
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<mrkiko> nbd: hi!! Some chance there is some possibility of fixing GitHub mt76 issue 776 ? Thanks!
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<swalker> updated openwrt/upstream, https://sdwalker.github.io/uscan/index.html
<bluecmd[m]> First PR sent for Cisco vEdge 1000 support :) https://github.com/openwrt/openwrt/pull/13038 - hopefully I haven't made too many mistakes reading the contribution guide!
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