<loki666>
Ah thanks I'll try it, it's a patch on top of tokyovigilante branch?
<kikuchan>
yes
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<loki666>
how do I reply to tokyovigilante patch series, since I never received the mails in the first place ?
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<Jookia>
loki666: you can download the series as an mbox and import that in to your reader, or there's a mailto: link
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<loki666>
ah ok thanks
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<loki666>
should I reply on PATCH 0/2, PATCH 1/2 PATCH 2/2 ?
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<Jookia>
if you tested the entire series than reply to patch 0/2 and explain a bit and write Tested-By: YourName <YourEmail> as if its a git commit
<loki666>
ok thanks for the help
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<tokyovigilante>
loki666: that's great. Thanks for the Tested-by (I am assuming that was you?) on the ML. Have just pushed (yet) another branch which has the GPU enablement code (and a few other QoL "hacks") - https://git.sr.ht/~tokyovigilante/linux/log/anbernic-image-hacks
<tokyovigilante>
That should give you working 3D acceleration
<tokyovigilante>
with CONFIG_DRM_PANFROST
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<loki666>
tokyovigilante: no problem thanks for pushing this
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<loki666>
[ 33.662170] Sending NMI from CPU 0 to CPUs 1:
<loki666>
and LCD is black
<apritzel>
random page faults were often caused by slightly wrong DRAM parameters: the DRAM works on early boot, when the "pressure" is not very high on the DRAM controller
<apritzel>
but when multiple cores issue concurrent requests to the controller, it falls over, because some timings might overlap
<macromorgan>
apritzel: Want to make sure before I push upstream that the shutdown register for axp717 was an oversight (and not done deliberately): https://paste.debian.net/1318311/
<apritzel>
macromorgan: was that just a thing that popped up in code review? PSCI should take priority for shutdown, so the Linux code would never be executed?
<apritzel>
but yeah, the shutdown sequence is different for the AXP717, so we need a patch, for correctness, at least
<apritzel>
anyway your patch looks alright
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<loki666>
kikuchan: with your lcd path, Panfrost driver is loaded, but emulationstation doesn't seems to load, stuck on batocera logo
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<acmeplus>
loki666: use the anbernic-image-hacks image from tokyovigilante. It should work as expected. kikuchan patches work well too, but you need enable drm panfrost, otherwise you get that splash screen in the framebuffer but no drm.
<macromorgan>
okay I'll push it, thanks
<macromorgan>
I think some users expressed issues with shutdown, but now that I mention it they might not be running the latest/correct A-TF
<loki666>
anbernic-image-hacks is giving me kernel panic and other issues
<loki666>
acmeplus: with kikuchan patch, drm is enabled and panfrost mesa driver is properly loaded (check the pastbin I posted), but it doesnt pass the splash
<loki666>
i'll try again anbernic-image-hacks with buildroot-ccache cleared
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<macromorgan>
how's the codec situation? Wondering if you guys need help with that before I finish off the battery (I'm not used to working on mainlining a device with so many others, it's nice)
<macromorgan>
I'm curious if we need proper support for sleep in A-TF or if we already have enough though
<apritzel>
macromorgan: do you mean suspend-to-RAM? That would be very tricky without the help of a management process, which the H616/H700 lack
<macromorgan>
yeah, that's kind of what I was hoping for yes. Do you mean like that RISCV core on some allwinners or just a bit more full-featured A-TF?
<apritzel>
suspend-to-RAM is implemented in the smaeul's crust firmware, that is running on the separate OpenRISC management core
<apritzel>
that allows to complete turn off the ARM cluster, but still run some code and watch for GPIOs, timer, IRQs for the wakeup
<apritzel>
the A64 and H6 have that core, the new A523 has a RISC-V core for that, but the H616/H700 don't have anything comparable
<apritzel>
I *guess* one could pull something off with turning off three of the A53s, and retreat as much as possible from the rest of the system, then keep core 0 alive to perform the wakeup
<apritzel>
but there is not much SRAM in the chip - that's why we run TF-A in DRAM already
<apritzel>
so there might be a technical possibility, but it's not easy, would be less efficient than on the other chips, and most importantly would need to be written from scratch
<macromorgan>
factory seems to have sleep, so I guess maybe that's how they do it?
<apritzel>
what does "sleep" mean, exactly?
<apritzel>
it could be as simple as just sending every core to WFI, or maybe turning three cores off, then send just core 0 to WFI
<apritzel>
I guess the kernel could help with turning most devices off, but DRAM would need to be still running
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