16:39 <wens> macromorgan: AFAICT the series "Add Anbernic RG35XX-SP" is ready?

16:39 <wens> v3 that is

16:40 <macromorgan> yes, I think they just wanted more testing on the switch from rsb to i2c

16:40 <wens> apritzel: are u-boot and atf ready?

16:43 <macromorgan> A-TF is fine already, I have a U-Boot patch series with 2 issues I'm still working on... issue 1 is I need to refine the device detection logic and issue 2 is I'm still not 100% confident in the RAM training

16:43 <macromorgan> for the device detection logic I need to add a tiny bit of code to make sure the wifi regulator is always disabled and the cpusldo is always enabled, otherwise it can't reliably detect the device differences with GPIO pulls

16:44 <macromorgan> for issue 2 I'm still lost

16:44 <macromorgan> even after taking these patches here I still get 2GB of RAM sometimes on reset/reboot: https://github.com/jernejsk/u-boot/commits/dram-fixes/

16:45 <macromorgan> I see the registers for the PHY and CTL0 for the RAM differ somewhat between mainline and BSP, so I'm wondering if we're still missing something. I'm just not smart enough to figure out what we're missing.

16:47 <macromorgan> my RAM part number (forget what it is off the top of my head) says 1866 in the datasheet, but the timing file is named 2133, so I wonder if that's a possible issue?

16:48 <macromorgan> I tried disassembling the boot0 in Ghirda, but it turns out I have no idea what I'm doing

16:48 <macromorgan> I also rebased the axp717 battery driver and it should be ready to go, I just have 1 or 2 outstanding questions before I resubmit

16:48 <macromorgan> if no one is working on the audio I'll take that next as my challenge

16:50 <macromorgan> I think I can easily add the 40xx to the U-Boot detection logic by checking the GPIO pulls on the pins for UART5. We might also be able to query the display panel over SPI for the 28xx and 40xx, but that will balloon the SPL code I'm fearing

16:53 <apritzel> macromorgan: the DRAM setup sequence contains some timing critical paths, with some magic delays, for instance. So just looking at the end result (register dump) might not tell you everything

16:53 <macromorgan> right, but so far I have nothing else to go on

16:54 <apritzel> macromorgan: what's the frequency the BSP sets for the DRAM chips?

16:54 <macromorgan> 672Mhz is what it says

16:54 <macromorgan> https://gist.github.com/macromorgan/ea39d090ef75281194bb2f0a307bb0c7

16:55 <macromorgan> I found a boot0 file in .a format that Ghirda liked a lot better (had function names any everything), but it was for the sun50iw10 and not the sun50iw9. Still, not smart enough to know what I'm looking at but the register addresses were all different

16:57 <apritzel> macromorgan: is that size misdetection the only issue you see? Because we see this on other SoCs and also H616 boards occasionally, so it's not an Anbernic specific issue

16:58 <macromorgan> sometimes it detects 2GB and freezes, sometimes it detects 2GB and boots, most of the time it just detects the 1GB and acts like everything is fine

16:59 <apritzel> freezes when? immediately after the detection? or later in U-Boot proper?

17:00 <macromorgan> immediately after the detection

17:01 <macromorgan> should I put logic in the board detection that says "if RAM != 1GB then reset"? Or just ignore it and hope for the best?

17:02 <macromorgan> of course I know at least one madlad with a hot air gun who would see that as a bug... (he modded 4GB on his)

17:04 <apritzel> I would ignore that for now, since there is probably a generic solution for that anyway

17:06 <macromorgan> okay then... I'll focus on honing the detection logic and try to push something out the door this week

17:07 <macromorgan> would it be possible to get approval on the RG35XX-SP? Specifically the change that moves the AXP717 to the i2c bus? That would help on the U-Boot bit since I'll see if they can accept that change immediately on the mainline tree.

17:07 <macromorgan> otherwise I'll just push one of the devices forward and leave the detection logic until a future update

17:08 <macromorgan> (you can use one of the U-Boots to boot any of the 6 devices if you bring your own tree)

17:13 <apritzel> macromorgan: not sure the timing is in your favour here: if any DT changes are accepted now, they would be merged only for 6.12-rc1, which is quite some time out still

17:14 <macromorgan> yeah

17:14 <apritzel> so anyway: please send *something*, so we get away from referring to code on random repositories, and can comment and agree on something on the list

17:14 <macromorgan> so I guess I'll just push the RG35XX-2024 forward, start on the refactoring of the board detect code, and then be ready to insert the rest of the code once the mainline trees are ready.

17:14 <macromorgan> right

17:15 <macromorgan> I'll get the RG35XX-2024 out the door with a non-mainline tree. When mainline is ready we can switch, and in the mean time if you bring your own dtb you can use that to boot any of the 6 devices.

17:42 <wens> macromorgan: oh, I merely meant if u-boot is ready for using i2c for the pmics. or maybe that was already the case?

17:42 <macromorgan> it's already the case, with the axp_spl driver we're good to go

17:43 <macromorgan> basically mainline A-TF (as-is with a recent pull) plus mainline U-Boot plus jernejsk's patches plus a device tree should be good enough for now for at least the 2024 model

17:43 <macromorgan> I'll submit that this week along with the rebase of the sunxi board selection logic

17:44 <macromorgan> then when we are ready to have board detection we'll have more or less all we need in place already

17:44 <macromorgan> RAM detect will still be occasionally wonky, but can't be helped for now

17:44 <wens> ok. I'll hold off on merging the patches then?

17:44 <macromorgan> if you've got patches go ahead, otherwise I do too

17:45 <macromorgan> I just need to clean them up and write documentation

17:45 <wens> I meant merging the series I mentioned before.

17:45 <macromorgan> which series? you mean the one for Linux?

17:45 <wens> "Add Anbernic RG35XX-SP v3" for Linux, yes

17:46 <macromorgan> yeah, that one should be good to go. Again the only holdup was waiting for more testing on the switch from rsb to i2c

17:46 <macromorgan> it *could* cause issues that require you to disconnect your battery and reconnect it, because that's the only way to reset the PMIC

17:46 <wens> I see. I'll merge it later this week then.

17:46 <macromorgan> thanks

22:14 <tokyovigilante> thanks wens, as responded on the list the RG35XX-SP v3 series looks good to go

22:14 <tokyovigilante> I am also seeing the odd DRAM misdetection, but that's unrelated to I2C it seems

22:16 <tokyovigilante> macromorgan: my current h616 audio codec additions to the current sun4i driver works in that it can play back audio, but currently runs at half speed despite seeming to configure the sample rate correctly, which I am assuming is an audio PLL clock bug

22:17 <tokyovigilante> Have rebased the DE33 patches against 6.11-rc1 and they are working well, so will send a V3 shortly with the limited feedback I have so far. I have also rebased the HDMI patches but they need more work and are untested currently, and the GPU power domain code also needs a relook, but has been working well in my testing