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<junari> Have anyone found a fix for the schedutil and h616 cpufreq?
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<tokyovigilante> I have not regrettably, one of the CFW groups I'm in is experimenting with ondemand with some tuning, but interestingly schedutil works on the vendor BSP for the H700 at least, so must be a bug somewhere. loki666 posted that it wasn't working on the ML but no feedback yet
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<junari> Yes, it doesn’t work for me either, neither with kernel 6.6 nor with 6.9
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<Robot_> does anyone have experience with t113-S4 (m4020dc0) chips? I have bought some, replaced on T113-s3 board, and ddr init code from xfel fails.
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<apritzel> Robot_: did you try mainline U-Boot?
<Robot_> i wanted to try just low level stuff first
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<apritzel> Robot_: well, I don't know much about the quality of the xfel DRAM code, but we spent quite some time to make the U-Boot DRAM code more robust
<Robot_> xfel code is the payload from allwinner, but my chip has fuse set to 0xa, so this patch is relevant
<Robot_> i will try to patch the payload manually, and then try uboot
<apritzel> Robot_: in U-Boot we have some DRAM parameters, for the joint D1/T113 DRAM init code, so I wonder if those parameters are different between T113-s3 and T113-s4
<apritzel> not sure how AW gets away with no parameters, is the DRAM code T113 only? I'd guess with co-packaged DRAM the parameters are the same at least for every T113-s3
<Robot_> xfel has parameters, it loads the DDR payload, and loads different parameter table into the payload at fixed offset
<Robot_> only difference in t113-s3 and s4 is the clock frequency, width and rank are autoprobed
<Robot_> apritzel: after patching the payload from xfel, i am able to bring up DDR in t113-s4
<apritzel> xfel has parameters> ah, didn't know
<apritzel> so my T113-s3 (on a MangoPi MQ-R) reads 0xa in that fuse, let me check how it behaves with that patch ....
<Robot_> it doesnt boot
<Robot_> i just tried with mangopi
<Robot_> both t113-s3 and t113-s4 chips have fuse set to 0xa
<Robot_> but need different remapping
<apritzel> right: DRAM:ERROR: auto scan dram rank & width failed
<Robot_> yay, china :) ....
<apritzel> so this more a s3 vs s4 differentiator than a wrong value then
<Robot_> can we differenciate between these two chips ?
<apritzel> that was just my next question as well ;-)
<apritzel> I guess the SID ID in the first word differs
<apritzel> so for my T113-s3 it's 0x93406000 (at address 0x03006200)
<Robot_> mango pi : 93406000 ac004814 01440821 60721f8b
<Robot_> t113s4: 93407200 5c004814 0105081c 10601353
<Robot_> jlcpcb t113s3: 93406000 cc004814 0147445c 607c1612
<Robot_> mango pi2: 93406000 ac004814 01440821 543f1c0b
<Robot_> jlcpcb t113s3 #2: 93406000 4c004814 01070a31 405618d4
<Robot_> t113s4 #2: 93407200 5c004814 0105081c 0c7119d3
<Robot_> this is chipid from ./xfel-ng extra efuse dump
<apritzel> ah, awesome, many thanks
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