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<owrt-1907-builds> Build [#22](https://buildbot.openwrt.org/openwrt-19.07/images/#builders/16/builds/22) of `armvirt/32` completed successfully.
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<Tusker> so, ipq806x experts... I started to use my port to the Extreme Networks AP3935i, and when I ported originally, I swear both ethernet ports were working properly, but for some reason eth0 is not functional. It link detects, and speed negotiates correctly, but no ethernet packets end up on the switch. It seems like a PLL related issue, but I don't know how to check PLL values for ipq806x. any ideas ?
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<PaulFertser> Tusker: it might be also delays for rx or tx lines of RGMII. PHY detect link and speed, and you talk to PHY via MDIO so you know it does, but traffic might not work (or might partially work, with heavy packet loss or one direction only). But it might be clocking for the RGMII interface itself, yes.
<Tusker> yeah, I was thinking about delays, but it's sgmii ...
<Tusker> if I set it to rgmii, it fails to bring it up
<PaulFertser> Well, sgmii too, I mean there's not only clocking but also delays which can be needed depending on PCB layout etc.
<PaulFertser> Have you checked both directions?
<Tusker> yeah, and given that I can get one or the other working (ie, if I change the DTS config so that one is broken, then the other works)
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<Tusker> so, at the moment, eth1 is working, and I can ssh to the LAN port
<Tusker> PaulFertser: https://pastebin.com/urQCjVhU you can see that link detection and chipset detection work fine
<PaulFertser> github sucks, can't even fetch from it from an IPv6-only host :/
<Tusker> I'll pastebin it
<Tusker> hang on
<stintel> PaulFertser: IPv6 not needed for MVP!
<PaulFertser> Tusker: so what do you change to make one or the other working?
<stintel> also won't add much revenue, so very low prio
<Tusker> PaulFertser: if I change the gmac1 reference to gmac3 for example, then eth1 fails to come up and then eth0 starts working
<PaulFertser> Tusker: so the SoC has 4 GMACs, and with DTS as you pasted gmac1 is called eth0 and it shows link up but no traffic. And then you basically disable gmac1 and enable gmac3 instead, and eth0 becomes gmac2, right? But your gmac2 was working properly before the change too.
<PaulFertser> Tusker: if you look at the vendor bootlog do you see gmac peripheral addresses used for the ethX interfaces?
<Tusker> it uses nss, so it's a bit confusing to figure out, do you want me to pastebin it ?
<PaulFertser> Tusker: might work
<PaulFertser> Also, /proc/interrupts might give additional clues
<Tusker> from factory ?
<PaulFertser> Tusker: yes
<Tusker> OK, will need to force it to boot the secondary image, give me a little time
<Tusker> serial boot log - https://pastebin.com/eH7GA205
<Tusker> proc interupts - https://pastebin.com/sZxzS4Lz
<swiftgeek> I have random novatek SoC with two MIP32 24KEc cores
<PaulFertser> Tusker: ok. It mentions GMAC0 and GMAC2. And you say GMAC2 works for you. What about GMAC0 then?
<swiftgeek> is there any special requirement need to make SMP magic happen?
<swiftgeek> like some cache coherent interconnect ?
<Tusker> hmm... let me try gmac0 again, I am sure I tried it before
<Tusker> what's the quick way to rebuild the dts and kernel ?
<Tusker> rather than having make go through all the packages...
<PaulFertser> make target/linux probably
<Tusker> nah, it thinks it's up to date...
<PaulFertser> Just make then, it won't be rebuilding what doesn't need to be rebuilt.
<Tusker> yeah, but it takes a bit of time going through and thinking about each package...
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<Tusker> yup, gmac0 behaves the same
<Tusker> PaulFertser: dmesg from openwrt - with gmac0 - https://pastebin.com/0rE9LPaN
<PaulFertser> Tusker: do you see eth0 link up/down events when you physically plug/unplug cables?
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<johnf> blocktrron_: hey, please let me know if you need anything else for PR 4246, really appreciate you taking a look and helping me to improve the request
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<Tusker> PaulFertser: now ? or before ?
<PaulFertser> Tusker: now
<Tusker> hang on, let me unplug both
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<PaulFertser> Better unplug one by one I guess
<Tusker> yeah, both detect link down and then renegotiate the link speed
<PaulFertser> And all the link up and down events were expected, and it's not like they both go down and the same time or anything?
<Tusker> as expected
<PaulFertser> Tusker: do you see 220 increasing in /proc/interrupts?
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<PaulFertser> Tusker: guess I was looking at wrong dtsi then. But I see eth0 interrupts increasing.
<Tusker> yeah, I see that too
<Tusker> could it actually be rgmii even though sgmii "seems" to work with link detect and chip detection ?
<PaulFertser> Link detect is done via MDIO, a different bus.
<PaulFertser> So probably it's gmac0 and rgmii, who knows
<Tusker> OK, let me see
<PaulFertser> The datasheet for AR8035 says it supports RGMII
<Tusker> OK, let's try rgmii and gmac0
<PaulFertser> And AR8031 supports both RGMII and SGMII.
<Tusker> so, maybe my brain thought sgmii was actually working, and through trial and error I managed to think both ports worked on sgmii, but in fact I was just testing one PHY, and just hooking it up to eth0 or eth1
<PaulFertser> Tusker: apparently SGMII is working with GMAC2 and something you see as eth1 now, and your output says it's AR8031 so that's possible.
<PaulFertser> However AR8035 only supports RGMII, and apparently it's connected to GMAC0.
<Tusker> OK
<Tusker> that is starting to make a bit of sense now to my madness :)
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<PaulFertser> Tusker: guess still no dice? :(
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<Tusker> PaulFertser: rgmii2_pins are conflicting with LEDs (coincidentally they were the LAN gpio I defined...)
<Tusker> so, removed the LEDs for now, booting a rebuilt just now
<PaulFertser> Tusker: but do you need rgmii2_pins and not rgmii0_pins for gmac0?
<Tusker> i couldn't see any other examples for rgmii0_pins... but let me try that
<Tusker> no such thing..
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<Tusker> current error is "eth0: stmmac_hw_setup: DMA engine initialization failed"
<Tusker> PaulFertser: no luck... I suppose I need to figure out what the pinmux is, and I can't seem to find the IPQ8068 SoC datasheet to check
<PaulFertser> Tusker: :(
<PaulFertser> Tusker: sleep well
<PaulFertser> Tusker: DMA engine shouldn't be related to pins though.
<Tusker> do you want a look at the current dmesg ?
<PaulFertser> Tusker: paste it just in case :)
<Tusker> eth0 doesn't show in /proc/interupts with the error message
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<Tusker> eth1 is not working at all with the current config
<Tusker> dts at the moment is https://pastebin.com/LcdsDu0A
<PaulFertser> Tusker: that's odd, gmac2 settings shouldn't be affected by what you do with gmac0.
<Tusker> link detection on both don't work
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<Tusker> anyway, need to sleep :)
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<Tusker> thanks for the pointers, I can play with it a bit tomorrow
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<Tusker> ok, removing pinctl-0 allows it to come up in rgmii mode, but back to the same behaviour as sgmii mode, where it comes up but no traffic appears on the link
<Tusker> sleep...
<Tusker> bye :)
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<fda> git am in feeds/luci
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<fda> in case you missed it: descriptions for 38 patches added
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<dangole> fda: sent you some PM before, maybe you didn't get and i will send again now
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<blocktrron_> johnf: ill have a look
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<owrt-snap-builds> Build [#221](https://buildbot.openwrt.org/master/images/#builders/51/builds/221) of `ramips/rt3883` completed successfully.
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<Tusker> PaulFertser: any idea on where to get the SoC datasheet for the ipq8068 ?
<PaulFertser> Tusker: no :(
<PaulFertser> Tusker: good morning :)
<Tusker> morning :)
<Tusker> i suppose it's going to be trial and error until it works
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<PaulFertser> Tusker: if there're working examples of gmac0 working in rgmii mode then I'd expect that to be applicable.
<Tusker> yeah, but is the pin out different between 8064 and 8068 ? I am trying the db149 method which defines two pins for gmac0 rgmii pin control, so hope it goes OK
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<Tusker> sleep well Paul
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