Tapper has quit [Ping timeout: 482 seconds]
Weasel____ has quit [Ping timeout: 480 seconds]
mangix has quit [Remote host closed the connection]
mangix has joined #openwrt-devel
danitool has quit [Quit: Cubum autem in duos cubos, aut quadratoquadratum in duos quadratoquadratos]
fda has quit [Read error: Connection reset by peer]
fda has joined #openwrt-devel
fda has quit [Read error: Connection reset by peer]
fda has joined #openwrt-devel
Tapper has joined #openwrt-devel
Tapper has quit [Ping timeout: 480 seconds]
Tapper has joined #openwrt-devel
goliath has joined #openwrt-devel
Tapper has quit [Ping timeout: 480 seconds]
Tapper has joined #openwrt-devel
Tapper has quit [Ping timeout: 480 seconds]
Tapper has joined #openwrt-devel
Tapper has quit [Ping timeout: 480 seconds]
goliath has quit [Quit: SIGSEGV]
mrkiko has joined #openwrt-devel
Tapper has joined #openwrt-devel
Tapper has quit [Ping timeout: 480 seconds]
Tapper has joined #openwrt-devel
goliath has joined #openwrt-devel
Tapper has quit [Ping timeout: 480 seconds]
Tapper has joined #openwrt-devel
decke has joined #openwrt-devel
FPSUserename has joined #openwrt-devel
FPSUserename has quit [Remote host closed the connection]
FPSUserename has joined #openwrt-devel
rsalvaterra_ has joined #openwrt-devel
rsalvaterra has quit [Ping timeout: 480 seconds]
danitool has joined #openwrt-devel
figgyc has quit [Read error: Connection reset by peer]
figgyc has joined #openwrt-devel
rsalvaterra_ has quit []
rsalvaterra has joined #openwrt-devel
Namidairo has quit [Ping timeout: 480 seconds]
aleasto has joined #openwrt-devel
<rsalvaterra> hauke: Ping. Quick question, how do you edit/refresh gcc patches? The wiki seems outdated/wrong in that regard.
<FPSUserename> PaulFeetser do you know when you'll be looking into that dump? Just so I know when to come back online on IRC
<Habbie> FPSUserename, you should really get a bouncer or a VM with an irc client :)
<Habbie> you missed a whole conversation last night
<FPSUserename> oh lol
<FPSUserename> I know that KDE plasma has a build in IRC client, but I'm not using my laptop at the moment. I'll check if I can find a client for bindows
<FPSUserename> Any highlights?
<Habbie> hurricos also looked at the dump
<Habbie> and figured the password might be double MD2 instead of MD5
<Habbie> but nobody has cracked it yet
<Habbie> 23:24Z <hurricos> it looks like the whole function is all one, too, which makes it hard to get into u-boot by shorting SPI pins
<Habbie> 23:24Z <hurricos> because it will simply not be able to load the prompt
<Habbie> 23:24Z <hurricos> pretty securely written
<FPSUserename> Yikes
<stintel> or join via matrix
<Tusker> what device is this ?
<Habbie> Tusker, 'KPN Experia Wifi', MT7621-based
<Habbie> and i took mtd dumps from mine
<FPSUserename> Would it be possible to do a complete overwrite with a uboot from another device, or would that cause issues because a uboot is device specific
<tmn505> stintel: the channel is logged at https://oftc.irclog.whitequark.org/openwrt-devel, could that be advertised in the topic?
<FPSUserename> That would probably be done from jtag or directly written onto the nand
<Habbie> tmn505, oh, neat
<Habbie> FPSUserename, if you can overwrite like that, you can do it even as an experiment
<Tusker> yeah, I think I would attack it by just writing the kernel and filesystem directly
<Tusker> and leave uboot as is
<FPSUserename> oh that's neat regarding the logging
<FPSUserename> I'll check how matrix connects to this
<stintel> oh, that's supposed to be advertised in the topic
<stintel> looks like I don't have chanserv access, can't add it
<FPSUserename> Doesn't look like matrix connects to this channel though. It's separated https://openwrt.org/contact
<Habbie> matrix also bridges to irc
<stintel> #_oftc_#openwrt-devel:matrix.org
stintel[m] has joined #openwrt-devel
<stintel> see :)
<stintel> not liking that ident though
<FPSUserename> hmm
<FPSUserename> No results for "#_oftc_#openwrt-devel:matrix.org"
<FPSUserename> and it's the OFTC room
<Habbie> stintel, 'what color?' 'stijn'
<stintel> eh ?
<Habbie> stijn-tint
<stintel> ahhhhh
<stintel> heh
<Tusker> FPSUserename: if you set your tftp server to 192.168.11.2 (as per that mtdblock2) do you see any tftp traffic if you boot with the reset button pressed ?
<FPSUserename> will check, but how do I connect to this irc chat through matrix (element). The channel stintel forwarded yields no results
<FPSUserename> also I haven't setup a tftp server yet
<Tusker> or even just run wireshark and see whether you see any traffic coming from 192.168.11.1 during boot
<FPSUserename> but why would 11.1 show any traffic? The whole network connection is on 2.x, right?
<Habbie> after boot, yes
<Habbie> the uboot settings refer to 11
<Tusker> in mtdblock2 it shows the recovery boot file linux.trx-recovery and mentions those IP addresses, which is probably the recovery mode default server IP
<FPSUserename> ah okay. Will check wireshark
<Tusker> or easier to just filter based on mac address
<Tusker> in case the IP is different on your uboot
<Tusker> I assume you've seen the page - http://www.alfredklomp.com/technology/experia-v8/ ?
<rsalvaterra> stintel: I couldn't read the wall of text yesterday, what are you guys hacking? I saw some hashcat activity… :P
<Habbie> Tusker, yep, saw that
<Habbie> i'm waiting for FPSUserename to try the JTAG trick on the Experia Wifi :)
<Habbie> (it's not exactly the same device)
<rsalvaterra> Hm… The KPN box?
<Habbie> rsalvaterra, we're talking KPN boxes, yes
<FPSUserename> Nothing on 192.168.11.x
<Tusker> does the serial console change if you hold the reset button while booting ?
<FPSUserename> let me check
<FPSUserename> nope, it just "reboots"
<FPSUserename> so it doesn't show any additional info on resetting the device
<FPSUserename> 66896.072782ASUSTekC_ad:2b:ebBroadcastARP42Who has 192.168.2.0? Tell 192.168.2.149
<FPSUserename> I do see this, but I think that's my desktop trying to identify the extender lol
<Tusker> did you have the power unplugged when you held the reset button while powering on ?
<FPSUserename> no
<FPSUserename> will try that
<Habbie> FPSUserename, that is your desktop trying to find the .0 default gateway you configured on it
<FPSUserename> no difference on the serial output
<FPSUserename> stintel on which server is this channel located, because I can't find it on element
<Tusker> there must be a way to trigger the tftp recovery mode... it's there :)
<FPSUserename> it's only on freenode visible, but as a reference to "please join #openwrt-devel" on the channel #lede-dev
<FPSUserename> Tusker, yes you can choose to boot into tftp, but it gives a password prompt
<Tusker> that is when you type tftp on the uboot prompt ?
<FPSUserename> yes, it's option 1 to boot from tftp
<Habbie> it's a uboot menu, not a uboot prompt
<Habbie> i assume there's no autoboot to interrupt like in this doc :)
<Tusker> there might be hidden options in that menu... did you try each number ?
<FPSUserename> yes
<FPSUserename> each number requires the password except for the default boot from flash
<Tusker> but holding reset for a long time doesn't change anything? and pressing the reset button after booted, it resets, even on the uboot menu ?
<FPSUserename> nothing changes on the uart output
dangole has joined #openwrt-devel
<FPSUserename> It's the same
<Tusker> fun then :)
<FPSUserename> perhaps with a jtag thing, but I don't know where to connect that
<Tusker> do you have good photos of the board ?
<FPSUserename> I can make some
<Habbie> FPSUserename could probably .. yes
<Habbie> i can make photos too but my heatsink is still on
<FPSUserename> yes, but that photo kind of shows you what's under the heatsink
<FPSUserename> only the cpu, memory, ram
<FPSUserename> There's no separate jtag connection available
<Habbie> it was a bunch of pins on the edge in the v8 article
<Tusker> what are the two press buttons? one is WPS ?
<Habbie> black is reset, white is a power switch
<Habbie> wps is on the side
<Tusker> how about holding wps during uboot startup ?
<FPSUserename> same
figgyc has quit [Ping timeout: 480 seconds]
figgyc has joined #openwrt-devel
fpsusername[m] has joined #openwrt-devel
<fpsusername[m]> oh I had to forcefully join the chat through element
FPSUserename has left #openwrt-devel [#openwrt-devel]
<Tusker> anyway, time for me to log off, good luck :) did you try bridging the SPI to see whether it tried a different boot method ?
<fpsusername[m]> no
<Tusker> "If you hold both the reset and WPS buttons at boot, the bootloader will await a TFTP upload of a whole-flash image"
<fpsusername[m]> lets see
decke has quit [Quit: Leaving.]
<fpsusername[m]> no dice
<Tusker> OK, no other grand ideas coming from my brain at this time :) ciao
Tusker has quit [Quit: Time wasted on IRC: 12 hours 24 minutes 27 seconds]
Tapper has quit [Ping timeout: 480 seconds]
Tapper has joined #openwrt-devel
Tapper has quit [Ping timeout: 480 seconds]
<owrt-snap-builds> Build [#215](https://buildbot.openwrt.org/master/images/#builders/20/builds/215) of `gemini/generic` completed successfully.
Namidairo has joined #openwrt-devel
Namidairo has quit []
Namidairo has joined #openwrt-devel
danitool has quit [Quit: Cubum autem in duos cubos, aut quadratoquadratum in duos quadratoquadratos]
Tapper has joined #openwrt-devel
Tapper has quit [Ping timeout: 480 seconds]
<owrt-snap-builds> Build [#211](https://buildbot.openwrt.org/master/images/#builders/22/builds/211) of `ipq40xx/generic` completed successfully.
<owrt-snap-builds> Build [#235](https://buildbot.openwrt.org/master/images/#builders/6/builds/235) of `lantiq/xway` failed.
owrt-2102-builds has quit [Ping timeout: 480 seconds]
DLange is now known as Guest2579
DLange has joined #openwrt-devel
owrt-2102-builds has joined #openwrt-devel
Guest2579 has quit [Ping timeout: 480 seconds]
nitroshift has joined #openwrt-devel
minimal has joined #openwrt-devel
goliath has quit [Quit: SIGSEGV]
nitroshift has quit [Ping timeout: 480 seconds]
<hurricos> FPSUserename: The password is encrypted with md2 because the only set of magic numbres I can see in the u-boot dump are the MD2 S-Block
<fpsusername[m]> Hmm
<hurricos> s/encrypted/hashed/ rather
<fpsusername[m]> so can we reverse engineer that?
<fpsusername[m]> Seeing this online
<hurricos> fpsusername: Tried it
<hurricos> fpsuserename*
<fpsusername[m]> No luck?
<hurricos> you won't be able to reverse-engineer it. One good alternative would be to use a 16-pin SOIC clip
<hurricos> you won't be able to reverse engineer it without a very powerful computer*
<hurricos> I have a cluster of 12 x L5640, I'd have tried it if it made sense
<fpsusername[m]> What about the SOIC clip method
<hurricos> Just dump the firmware to get a DTS and build u-boot independently.
<fpsusername[m]> What should we be doing then? Replace the hash with a self made one?
<hurricos> MT7621 bootrom doesn't change.
<hurricos> yeah
<hurricos> no
<hurricos> well, that's one option
<hurricos> to start with
<Habbie> i have a full dump of mtdblock*
<Habbie> how do i find a dts?
<hurricos> You could overwrite it, but you'd need a 16-pin SOIC.
<Habbie> also, somebody should patch binwalk to recognise MD2 S-blocks
<Habbie> hurricos, well, i can also dd, but if i mess up, i have a brick
<hurricos> Habbie: Not everyone who implements MD2 uses that
<Habbie> (until i buy a 16-pin SOIC)
<hurricos> In these situations I always say, mainlining a U-boot build for the board is best because you can fix things.
<Habbie> hurricos, right, but it still would be nice if binwalk recognised it, like it recognised some crc32 constants
<hurricos> True. I think binwalk comes with different sets of magics
<hurricos> per installation
<Habbie> when you say 'mainlining', you mean installing mainline uboot?
<hurricos> Habbie: Yes, or rather, contributing to the mainline a build formula for that particular board
<Habbie> right
<fpsusername[m]> <Habbie "(until i buy a 16-pin SOIC)"> Uh, you could always overwrite the chip, unless it's hard bricked
<hurricos> fpsusername: that's the pont
<Habbie> fpsusername[m], not if i can't boot the device
<hurricos> I use a 16-pin chip clip for Ubiquiti Nanostation AC 5 Loco's
<fpsusername[m]> You don't have to boot it in order to program the flash using a clip though
<Habbie> fpsusername[m], but i don't have a clip
<fpsusername[m]> How did you dump it then?
<hurricos> probably by booting lol
<hurricos> clips are real expensive these days too, small electronics manufacturers are in the red
<Habbie> fpsusername[m], i have shell access to the box
<hurricos> I bought my 24-pin Pomona for $38
<fpsusername[m]> How did you get shell access to it?
<Habbie> fpsusername[m], can't say, sorry. I did tell KPN CERT about it today
<hurricos> good on you Habbie
<fpsusername[m]> Soic 16 clips aren't expensive from aliexpress
<Habbie> sure
<Habbie> i should probably order something now
<hurricos> oh, I guess China's back into production now
<hurricos> I bought mine in May 2020 lol
<Habbie> hurricos, can you recommend a specific (set of) clips from aliexpress perhaps?
<fpsusername[m]> Why did you tell kpn about it? Hope that they can help us?
<hurricos> Habbie: Nope, I bought direct from a Pomona reseller
<Habbie> fpsusername[m], because vulnerabilities in devices that are in a million households are a bad thing
<hurricos> Pomona 5252's are legendary, the knockoffs are about as good
<hurricos> but more brittle imo
<fpsusername[m]> Ah like that. Your firmware is a low level, might've been patched already
<Habbie> fpsusername[m], very likely, yes
<Habbie> i'll see what they say
<stintel> hmmmz my neochat messages are not coming through
<fpsusername[m]> I only wonder if a 16 pin soic clip will work on the CH341A programmer
<Habbie> fpsusername[m], otherwise you have a pi, right
<stintel> I bought a few cheap from ebay, broke rather quickly. I can recommend those 3Ms
<fpsusername[m]> Yes, that'd be possible as well, with the pi
<hurricos> I use a Pi, yeah. More reliable IMO than using a USB-based SPI one
<stintel> be sure to check the voltage of the chip ;)
<hurricos> all the 16 pin MXIC ones are 3v3 I thought ._.
<stintel> I nuked my first TP-Link OC200 because I read the NOR with a 3.3v reader while the SoC and NOR are 1.8v :)
<hurricos> 8 pins are 1.8
<Habbie> the chip datasheet says 8V
<Habbie> stop
<Habbie> the chip datasheet says 3V
<Habbie> dangerous typo there
<hurricos> LOL
<stintel> a weird one too :D
<fpsusername[m]> ahaha
<Habbie> it's because i was reading '8 pins' :D
<fpsusername[m]> Normally 3.3v on 3v would work, as it's most likely within the absolute limits
<Habbie> Vcc 2.7V-3.6V
<fpsusername[m]> So it looks like I'll have to get a SOIC clip and then see what we can do with the data
<stintel> those clips can be lifesavers so you should have one in your toolkit anyway ;)
<Habbie> hurricos, stintel, so is SOP and SOIC the same, or not?
<fpsusername[m]> <stintel "those clips can be lifesavers so"> If only it had a 24xxx chip instead
<fpsusername[m]> or a SOIC-8 chip
<Habbie> because you do have an 8-clip, like me
<Habbie> it -may- be enough to get data out at a lower speed, i haven't looked at the pinout yet
<stintel> Habbie: I don't think so (SOP vs SOCI)
<Habbie> good, i also am not getting that impression
<Habbie> so i'll order a 16
<Habbie> it'll arrive mid september
<Habbie> for the next project ;)
<stintel> :P
<Habbie> because of the conversation here i've been trying where the soic8 fits
<Habbie> like on the MCU in the new IKEA air quality sensor
<fpsusername[m]> Doubt it would work, since the chip is a lot wider
<Habbie> fpsusername[m], right! a set like that arrived here last week
<Habbie> well, it depends on whether you need those pins
<fpsusername[m]> <Habbie "well, it depends on whether you "> Exactly this. I didn't look into the pinout, but if you need a connection on pin 1 and 8 for example, this clip won't work
<Habbie> it's 8 and 15
<Habbie> and a few more
<Habbie> so, no
<fpsusername[m]> Rip, time to buy a clip and see y'all in 4 weeks haha
<Habbie> by then we'll have bricked five devices from a root shell in our impatience ;)
<Habbie> i wonder if the boot loader is signed
<Habbie> i wonder if the mt7621 even has such a concept
<fpsusername[m]> I'll keep an eye out on this chat
<fpsusername[m]> I mean, if there's no way around it besides using a clip to get past the boot security
<fpsusername[m]> And if the root shell access exploit won't be a viable choice, because of vulnerabilities
Rentong has joined #openwrt-devel
<fda> dangole: i tested with frequencies @1.0V. 125 and 300 are working. if i enable in dts only 125 / only 300 / 125 + 300 there are about 30transitions.
<fda> dangole: with 125+300 enabled, but set minfreq to 300 there are < 1 transition and the smallest temperature
Rentong has quit [Remote host closed the connection]
<fda> this works fine for me https://ibb.co/PTCWW34 https://ibb.co/TvHpgzc
goliath has joined #openwrt-devel
<rmilecki> what OpenWrt stores in /tmp/tmp.* ?
<rmilecki> Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
<rmilecki> rm: can't remove '/tmp/tmp.hHKjHE': No such file or directory
<rmilecki> ah, it's a result of mktemp that may be used for locking
Rentong has joined #openwrt-devel
<fpsusername[m]> Bought the clip and some jumper wires, since I didn't have enough female to female wires
<dangole> fda: that's very good news. do you feel like posting patches making the changes in dts to linux-dts? and then also submit that mbox as patch in target/linux/mediatek/patches-5.10 to OpenWrt via openwrt-devel?
Rentong has quit [Remote host closed the connection]
Rentong has joined #openwrt-devel
Rentong has quit [Remote host closed the connection]
snh has quit [Quit: ZNC - http://znc.in]
noltari has joined #openwrt-devel
snh has joined #openwrt-devel
snh has quit []
snh has joined #openwrt-devel
noltari has quit [Quit: Bye ~ Happy Hacking!]
Tapper has joined #openwrt-devel
noltari has joined #openwrt-devel
<fda> dangole: if you want to commit it quickly, you could use the refreshed patches on my server i send you. see the one with 8450 in name. im currently still on fixing some random things
<fda> dangole: you wrote about SDK: this is not exactly what im searching for :( i just want to have hosttools and toolchain in an archive to not have build them after i ran distclean. when i know openwrt better, i try to pack the correct paths
<owrt-snap-builds> Build [#257](https://buildbot.openwrt.org/master/images/#builders/1/builds/257) of `ath79/generic` failed.
eigma has quit [Ping timeout: 480 seconds]
<fda> i have a problem with ipv6 (i have only ULA here): odhcpd gives ipv6 adresses for every prefix ("hint") to every (v)lan
<fda> so there are multiple ipv6 on every client. config: ula_prefix='fda1::/48' - ip6assign='64' - ip6ifaceid='::1' - ip6hint='<depends on vlan>'
<fda> dnsmasq gives ipv4s correctly depending by (v)lan
eigma has joined #openwrt-devel
fda has quit [Remote host closed the connection]
fda has joined #openwrt-devel
<fda> on the router the ipv6 are assigned correctly by interface
fda has quit [Read error: Connection reset by peer]
fda has joined #openwrt-devel
<fda> or: when i disable all ipv6-dhcp settings, except for 1 interface, all interfaces get wrong ipv6s from this interface
<rsalvaterra> Guys, can anyone tell me how to refresh gcc patches? I've tried make toolchain/gcc/{clean,refresh}, as specified in the wiki, but it fails. (I also tried gcc/{minimal,initial,final}/{clean,refresh}, which I don't even know if it makes sense, with the same result.)
danitool has joined #openwrt-devel
<fda> maybe its better to use dnsmasq for dhco of ipv6 - it works by interface
<fda> rsalvaterra: if the patches dont apply, you have not changed them properly. there should be an error message which tells you more
<rsalvaterra> fda: They do apply, of course. I just don't know if they're fuzzy.
<fda> rsalvaterra: a bump without the patches does not make sense - as this is the most work if they dont apply
<rsalvaterra> fda: What? Have you looked at the commit? The patches are there, they apply, but they haven't been refreshed.
<fda> yep
<fda> rsalvaterra: why "Run-tested (built images):" if you cant apply the patches and so are not abe to build gcc
<rsalvaterra> fda: Did I wrote that I couldn't apply the patches?
<fda> rsalvaterra: " tell me how to refresh gcc patches"
<rsalvaterra> refresh != apply
<fda> dont know, check the output make
<rsalvaterra> If I couldn't apply the patches, I couldn't be running this…
<fda> maybe prepare is the correct target
<rsalvaterra> [ 0.000000] Linux version 5.10.54 (rui@crystalwell) (arm-openwrt-linux-muslgnueabi-gcc (OpenWrt GCC 11.2.0 r17220+52-ae1c5d0d6a) 11.2.0, GNU ld (GNU Binutils) 2.37) #0 SMP Wed Jul 28 14:56:21 2021
<rsalvaterra> … could I?
Tapper has quit [Ping timeout: 480 seconds]
<rsalvaterra> fda: That's the thing, I tried all possibilities I know of, to know avail… I wouldn't be asking for help othewise. :)
Tapper has joined #openwrt-devel
ServerStatsDiscoverertraveler4 has joined #openwrt-devel
MatrixTravelerbot[m] has joined #openwrt-devel
<fda> what is "refresh"?
<rsalvaterra> That's Quilt terminology. Patches are applied in chunks, each chunk as an associated context.
<rsalvaterra> When the context changes position (for example, then code was added before the patch context), Quilt is still "smart" enough to find it and apply it correctly (most of the time).
<rsalvaterra> In this situation, we say the patch contains "fuzz". It's still appliable, but it's relying on smarts. :)
<rsalvaterra> Refreshing is the procedure by which the patches are updated to match the current context (eliminating the said fuzz).
<rsalvaterra> This is the way I understand it (haven't digged too deep in the Quilt documentation), so please correct me if I'm wrong, veteran devs. :)
<rsalvaterra> *haven't dug
<rsalvaterra> I fail at English.
Tapper has quit [Ping timeout: 480 seconds]
Tapper has joined #openwrt-devel
Weasel___ has joined #openwrt-devel
<rsalvaterra> stintel: Oh, wow…! https://git.openwrt.org/?p=openwrt/staging/stintel.git;a=commitdiff;h=aa87d4f7d2e7995c7dcd1ef420f73b4edd52d70a
<rsalvaterra> The perks of building everything from scratch… :)
<stintel> rsalvaterra: feel free to cherry-pick and push once you get your commit access ;)
<stintel> ow
<stintel> there is a missing \
<rsalvaterra> Wait, musl actually *requires* ELFv2 ABI in ppc64 (big-endian)…! o_O
<stintel> I need this for my Firebox M300 experiment :)
<stintel> but maybe the other stuff that is now missing due to the missing \ is breaking stuff
<stintel> imagine that
<stintel> *facepalm*
<stintel> why do I get the feeling it's going to be a long night
<rsalvaterra> stintel: You brought it upon yourself. :P
<rsalvaterra> Nice hardware, though… e6500-based, right?
<stintel> I think so
<stintel> actually. l5 and l6
<stintel> grid: is there in your pile of docs something that can help me translate the RCW value in the link above?
<grid> you can import it into the QCVS or whatever it's called eclipse extension
<stintel> grid: also, it seems that the OEM u-boot is actually uploading the FMan microcode, so this should probably not be the reason why I couldn't get network to work
<grid> QCVS
<grid> maybe, not sure if there's microcode in ROM
<rsalvaterra> stintel: Four cores with SMT and AltiVec…!
<stintel> rsalvaterra: yeah, I would really like to get this thing working
<stintel> even if it's just with the ports that are not connected to a switch
Borromini has joined #openwrt-devel
<grid> "QCVS offline installation packages for CodeWarrior for Power Architectures Rev 4.5.zip" needs old eclipse which needs jre7
<grid> you can upgrade eclipse a few versions after installing it, but it won't do the initial install on newer eclipse
<stintel> Firebox M300 can be found on ebay for ~EUR150
<stintel> grid: that sounds cumbersome
<stintel> I guess I'll be installing an old distro in a vm
<grid> i just used a standalone jre
<rsalvaterra> stintel: 88E6171 switch, nice…
<stintel> yeah, it could be a real fun device I think
<stintel> if I can get it to work :P
<grid> #!/bin/bash\nexport PATH=~/devel/freescale/jdk1.8.0_281/bin:$PATH\npushd ~/devel/freescale/eclipse\n./eclipse\n
<rsalvaterra> stintel: Are you writing the device tree by trial and error? :P
<stintel> kind of
<stintel> ow
<stintel> I have a ubuntu 14.04 still around
<stintel> party
<grid> oxygen.3 march 2018 is the newest eclipse that'll work with the plugin, it needs to be even older to install it (eclipse-SDK-4.2.2-linux-gtk-x86_64.tar.gz i think)
<rsalvaterra> ## Flattened Device Tree blob at 00fc0000
<stintel> rsalvaterra: well I started by decompiling the OEM DTB to DTS
<rsalvaterra> Right, that's where I'd start. :)
<stintel> and combining that with what's in the upstream kernel, as some T2081 is supported in vanilla kernel
<rsalvaterra> stintel: I believe adding it as a mpc85xx subtarget isn't the way to go, though… that's ppc64, we probably should create a new target, no?
<grid> stintel: here's the rough steps once in there: https://imgur.com/a/t6cCwU0
<grid> start with the default PBL for that SoC, then import, and it'll highlight everything that has changed
<stintel> rsalvaterra: bcm27xx is also 32+64 subtargets combined
<rsalvaterra> stintel: Right, forgot about the RPi's…
<stintel> grid: looks like the values in your screenshots are the same as the ones in my NOR
<grid> because i copied it from your paste
<stintel> grid: oh :D
<grid> it'd be nearly impossible to decode that crap without using the eclipse plugin
<grid> i'm not even sure if the datasheets have enough info to make sense of it
<grid> i had to get in there to enable mmc boot and get the second pci slot working
<stintel> hmmm that ubuntu vm doesn't want to boot completely
<grid> disable unused serdes lanes, change PLL clock multipliers, etc.
<grid> building a u-boot.pbl bakes this into the image it spits out: https://github.com/u-boot/u-boot/blob/master/board/freescale/corenet_ds/rcw_p2041rdb.cfg
<grid> so i had to replace the RCW there with the one i made in QCVS before writing it to mmc, since i had the jumpers set to load RCW from mmc
<stintel> I'm not building anything u-boot related though
<grid> k
<stintel> hmm maybe I need to read about that pbl thing
rsalvaterra_ has joined #openwrt-devel
rsalvaterra has quit [Ping timeout: 480 seconds]
<stintel> ERROR: please fix package/feeds/packages/apparmor/Makefile - see logs/package/feeds/packages/apparmor/dump.txt for details
<stintel> hmmm
<stintel> seems to trip over include ../../../packages/lang/python/python3-package.mk
<Slimey> hmm i have a dlink dgs-1100-08P with 25q16jvsiq flashrom and rtl8370n that looks interesting and it has a serial header ;)
<Slimey> grid what is that pic of
<grid> Slimey: the imgur? NXP QCVS eclipse plugin
<stintel> bah can't install it
<stintel> complains about touchpoint missing
<Slimey> i have some P1010 and T1023E that have a custom OEM uboot im attempting to get working with OpenWrt
<stintel> ah wait
<Slimey> based wifi aps that is
<grid> i don't remember if you also need com.freescale.eclipse.3.7.updater.custom.updatesite.zip
<stintel> had to install things one by one
minimal has quit []
<fda> @rsalvaterra_ i know this as "autofix"
<rsalvaterra_> fda: Hm… never heard of it, to be honest. :/
<fda> but i dont know if this the "official" name
<hauke> I would like to see this realtek change in openwrt 21.02 branch: https://git.openwrt.org/ad712c71cea3b26d8a7c53200c742181d1d040e7, but it conflicts. It would be nice if someone of the realtek switch experts could prepare and test a branch for the openwrt 21.02 relase
<hauke> I am also fine with backporting bigegr changes there
<fda> has the openwrt toolchain no tool to do this automatically?
<stintel> grid: after importing. changes are hilighted how?
<grid> yellow
<grid> e.g. BOOT_LOC i think
<fda> rsalvaterra_: in case someone/you want to port it from freetz: https://github.com/Freetz-NG/freetz-ng/blob/master/tools/freetz_patch#L157
<grid> yellow with my gtk theme anyways
<stintel> running it on windows atm
<stintel> grid: did you see many changes?
<stintel> I see blue vs grey text
<grid> no just a few
<grid> boot location was changed to flash
aleasto has quit [Remote host closed the connection]
<grid> it may be loading a hard-coded RCW. depends on the strapping pins.
<PaulFertser> fda: why freetz people didn't use OpenWrt?
<fda> i do ^^
<fda> PaulFertser: drivers for many things, like dsl, dect, pots (internal + external) dont work with openwrt
<fda> as they are closed source
<fda> and so the kernel version could even not be changed
<PaulFertser> fda: ah, of course. So it's like a vendor firmware "mod" rather than real OS, I see.
<PaulFertser> fda: still better than vendor version I guess, makes sense.
<fda> yes, freetz = avm + modification
<stintel> grid: ok I see now, default has BOOT_LOC PCIe1
<fda> with freetz you could remove some avm things, some to change and build additional packages
<stintel> aha now I see yellow after closing project, not saving, opening and importing again
<stintel> ah once I expand other things the yellow disappears
aleksander has joined #openwrt-devel
<fda> i removed CONFIG_PACKAGE_odhcpd-ipv6only + CONFIG_PACKAGE_dnsmasq and replaced with CONFIG_PACKAGE_dnsmasq-dhcpv6 and now ipv6 are assigned by interface correctly
<fda> the interesting part is that there are 0 visible changes in luci
<stintel> grid: seeing quite some differences actually
<stintel> interesting stuff, thanks a lot for pointing me to that QCVS
Borromini has left #openwrt-devel [#openwrt-devel]
aleksander has quit [Quit: Leaving]
<owrt-snap-builds> Build [#202](https://buildbot.openwrt.org/master/images/#builders/62/builds/202) of `tegra/generic` failed.
<Slimey> would this be correct for my boards? P1010 = e500 and T1023 = e5500
<Slimey> ifeq ($(ARCH),powerpc)
<Slimey> CPU_CFLAGS_e5500:=-mcpu=e5500
<Slimey> CPU_CFLAGS_e500:=-mcpu=e500
<stintel> e500 doesn't exist, see man gcc
<stintel> e500mc or e500mc64
<Slimey> even if its e500v2 based?
jlsalvador2 has joined #openwrt-devel
<Slimey> where do the CPU_CFLAGS_* come from
<tmn505> from include/target.mk
<stintel> Slimey: if you set CPU_TYPE:=e6500 in a target or subtarget, CPU_CFLAGS_e6500 will be used for CFLAGS
<stintel> afaik
<stintel> include/target.mk: DEFAULT_CFLAGS=$(strip $(CPU_CFLAGS) $(CPU_CFLAGS_$(CPU_TYPE)) $(CPU_CFLAGS_$(CPU_SUBTYPE)))
<Slimey> heh okay
<stintel> magic ;)
jlsalvador has quit [Ping timeout: 480 seconds]
jlsalvador2 is now known as jlsalvador
rsalvaterra has joined #openwrt-devel
rsalvaterra_ has quit [Ping timeout: 480 seconds]
Rentong has joined #openwrt-devel
Rentong has quit [Remote host closed the connection]
rsalvaterra has quit [Remote host closed the connection]
rsalvaterra has joined #openwrt-devel
Rentong has joined #openwrt-devel
rsalvaterra_ has joined #openwrt-devel
rsalvaterra has quit [Ping timeout: 480 seconds]
Rentong has quit [Ping timeout: 480 seconds]
Tapper has quit [Ping timeout: 480 seconds]
rsalvaterra_ has quit [Remote host closed the connection]
rsalvaterra has joined #openwrt-devel
Tapper has joined #openwrt-devel
<owrt-snap-builds> Build [#236](https://buildbot.openwrt.org/master/images/#builders/6/builds/236) of `lantiq/xway` completed successfully.
aleksander has joined #openwrt-devel
dangole has quit [Remote host closed the connection]
dangole has joined #openwrt-devel
rsalvaterra_ has joined #openwrt-devel
<owrt-snap-builds> Build [#214](https://buildbot.openwrt.org/master/images/#builders/47/builds/214) of `bcm27xx/bcm2710` failed.
rsalvaterra has quit [Ping timeout: 480 seconds]
aleksander has quit [Quit: Leaving]
Rentong has joined #openwrt-devel
Rentong has quit [Remote host closed the connection]