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<rmilecki>
SpectreDev_01: like this: of_parse_phandle_with_optional_args(np, "nvmem-cells", "#nvmem-cell-cells", index, &cell_spec);
<rmilecki>
SpectreDev_01: see of_nvmem_cell_get()
<rmilecki>
i don't think you need to read it on your own though
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<SpectreDev_01>
Hmm I see
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<KanjiMonster>
rmilecki: I have no idea how it is implemented in bcm49xx, but on bcm63xx(mips) accesses to the memory mapped spi flash are translated to spi calls (there's even a register to configure the command, wether 3 or 4 address bytes etc)
<KanjiMonster>
likely the memory mapped NAND works similarily, so concurrent use of the NAND controller directly and indirectly via the memory mapped area might interfere with each other
<rmilecki>
KanjiMonster: yeah, it matches what response I got already
<rmilecki>
KanjiMonster: i modified NVMEM driver to cache whole NVRAM content
<rmilecki>
https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=bcd76dc7d825b39e2585f1cc165b157a4fb8daa4 ("bcm53xx: store a copy of NVRAM content in NVMEM driver")
<KanjiMonster>
for spi nand/nor there's spi-mem to use these kind of things as an accelerator, but no such thing exists for raw nand. and it would still require you to go through the mtd system
<KanjiMonster>
assuming reading from the memory mapped area is faster (or uses less cpu ressources) than using the nand controller
<robimarko>
And your pinctrl references in both UART and I2C are completely broken
<robimarko>
Also, why do you even have a DTSI and then a DTS for single device?
<robimarko>
And again with the copy/paste from decompiled DTB:https://github.com/SpectreDev-007/openwrt/blob/master/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200.dtsi#L28C30-L28C30
<robimarko>
This doesnt work, that reference is not valid at all
<robimarko>
You cannot copy/paste from decompiled DTB like this
<robimarko>
All phandles and thus references to them are dynamic
<robimarko>
Can you provide me with the DTS from stock FW?
<robimarko>
I will make you a simple DTS that just has UART working
<SpectreDev_01>
Yes I can one second
<SpectreDev_01>
It's one device but there's 2 revisions and the difference between them is just partition layout from what I can see
<robimarko>
Well, 8 of those have nothing to do with WLAN
<robimarko>
Is the NSS region even defined, we can remove that from IPQ8074 as well to save some RAM
<robimarko>
Until its actually sued
<robimarko>
*used
<\x>
can you like run 8 nss and still 55MB wlan q6?
<robimarko>
Yes
<robimarko>
But the whole 256MB profile is junk, they remove half of the features to get it to fit
<\x>
hmm, can I zero out NSS?
<robimarko>
Its basically for the no-name boards that are instant e-waste
<robimarko>
If you are not using NSS-DRV you can just remove the NSS memory region
<\x>
which else can be zeroed out? m3 dump right?
<robimarko>
Yes, that is completely unused
<\x>
thanks man
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<dangole_>
Ansuel: are you planning to backport PHY LED stuff to openwrt-23.05? I'm asking because after recent commits kernel patches can no longer be cherry-picked from main branch and apply cleanly on openwrt-23.05 branch. And the backport would solve that. Otherwise we'll need a commit refreshing kernel patches on the openwrt-23.05 branch which will make future backports even more difficult...