ChanServ changed the topic of #asahi-gpu to: Asahi Linux GPU development (no user support, NO binary reversing) | Keep things on topic | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-gpu
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<alyssa> lina: 42 files changed, 2624 insertions(+), 469 deletions(-)
<alyssa> wow, sure whittled down my patch stack a lot T_T
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<alyssa> eh, we'll get through it :)
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<alyssa> Opened some more "hopefully not at all scary" MRs to whittle things down
<alyssa> lina: https://gitlab.freedesktop.org/asahi/mesa/-/merge_requests/95 <-- this one you definitely want to look @
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<lina> Looks like my previous kernel fix didn't fix the Firefox hangs, it just made them not spin a CPU core... ;;
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<lina> jannau: Do you remember what test was failing with the TVB thing?
<jannau> lina: no
<jannau> at least not out of my head
<lina> Do you remember if it was dEQP-GLES3 or dEQP-GLES31 or something else?
<jannau> lina: deqp-gles3/functional/shaders/builtin_functions/precision/matrixcompmult/highp_fragment/mat3
<jannau> lina: with asahi.initial_tvb_size=64 and alyssa's es31 branch only atomic tests failed
<jannau> yes, es31. the top 2 commits were unfinished tests for the heisenbug
<jannau> yes, that looks like atomics tests
<jannau> I suspect some atomics tests might succeed spuriously
<lina> These are the tests that failed without "atomic" in the name but I think they're related?
<lina> dEQP-GLES31.functional.compute.basic.image_barrier_multiple,Fail
<lina> dEQP-GLES31.functional.compute.basic.ssbo_cmd_barrier_multiple,Fail
<lina> dEQP-GLES31.functional.compute.indirect_dispatch.gen_in_compute.multiple_groups,Fail
<lina> dEQP-GLES31.functional.compute.indirect_dispatch.upload_buffer.multiple_groups,Fail
<lina> dEQP-GLES31.functional.image_load_store.early_fragment_tests.early_fragment_tests_stencil,Fail
<lina> dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth,Fail
<jannau> looks familiar, Alyssa looked at some/all of them and said they use atomics
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<alyssa> correct
<lina> TL;DR today I fixed a bunch of kernel stuff, both more sizing/param issues (I have testable test data for it now!) and also implemented the sync TVB growth event though I don't think we actually use/need it now, it was getting triggered by some bad settings I think. But you can test it with ASAHI_MESA_DEBUG=synctvb if you want (see open MR).
<lina> I got through GLES3 in that mode but GLES31 deadlocked or something, I'll look into it later with lockdep (might be a regression with synctvb, if so we don't care). Without any overrides things work ^^
<alyssa> woot
<alyssa> any progress on our bugs? or is this strategy of "well, it definitely fixed SOMETHING!"
<alyssa> :-D
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<lina> alyssa: Well the one jannau ran into with the TVB size at least... and I'm pretty sure I fixed other stuff too, yes ^^
<alyssa> I heh
<alyssa> it's my understanding the atomics with clustering isssue and the heisenbug are the hot items
<alyssa> (blocking CTS)
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<_jannau__> I think only atomics are blocking CTS on t600x, the heisenbug didn't reproduce there
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<alyssa> _jannau__: let's do process of elimination
<alyssa> _jannau__: can you git clone github.com/dougallj/applegpu on macOS on t600x, run https://paste.debian.net/1285009 and send the output?
<alyssa> (Or anyone else with an M1 Pro/Max/Ultra)
<dottedmag> m1max, if it matters
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<alyssa> dottedmag: thanks
<alyssa> that indeed sets 1 bit that isn't set on M1
<alyssa> bit 45
<alyssa> I wrote a patch and it wedged my M1
<alyssa> that sounds like we're on the right track
<alyssa> reason: AfFault,
<alyssa> spicy
<alyssa> ooh and green screen when shutting down
<alyssa> did i wedge dcp too? powerful mesa patch
<alyssa> Give that a try on t600x
<alyssa> with the atomics tests
<alyssa> if that changes anything, let me know drm_asahi_params_global::num_clusters_total so I can do the proper runtime detection and not wedge t8103
<jannau> alyssa: all atomic tests in es31 pass now on t6002
<alyssa> Oof.
<alyssa> Alright.
<alyssa> I mean, that's good but
<alyssa> spicy.
<alyssa> I had a hunch already that bit 45 controls cache of some kind
<alyssa> this.. adds to that suspicion >:)
* alyssa digs up her notes on cache bits
<jannau> num_clusters_total should be 2 / 4 / 8 for m1 pro / max / ultra
<alyssa> k, yeah
<jannau> the lower core count versions have always cores in all clusters disabled
<jannau> shall I start a full CTS run?
<alyssa> jannau: Let me get you a non-stupid branch to use
<jannau> ok
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<alyssa> kicking off CTS on M1 to break sure I didn't break anything in the meantime
<alyssa> jannau: alyssa/mesa:agx/es31-v2
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<alyssa> That doesn't have your wide_color fix on the mesa side, and the 10-bit thing still hasn't landed upstream anyway, so unfortunately still an x11_egl run
<alyssa> but... should pass, probably, maybe? O:)
<jannau> aye
<alyssa> (Strictly you could do a Wayland run with your patch and point to it and say "look it's your bug" but it would complicate things.)
<alyssa> anyway, M1 CTS is running
<jannau> we could do wayland and disable 10-bit formats
<alyssa> meh
<alyssa> easier just to do the x11_egl run for now
<alyssa> anyway, M1 CTS is running
<jannau> m1 ultra x11_egl CTS is running as well
<alyssa> who will win? =D
<alyssa> nominally the ultra but the CTS is completely single threaded CPU bound
<alyssa> so..
<jannau> the failing cts run was slower on the ultra than a succesful one on m1
<jannau> iirc 41 minutes vs. 28 min
<alyssa> sure
<alyssa> deqp-runner does a bunch of debug stuff for failing tests, idk what the real CTS runner is doing
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<alyssa> M1 seemed to finish
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<jannau> finished here as well after 52 minutes, still failed
<alyssa> :'(
<jannau> KHR-GLES31.core.draw_indirect.advanced-twoPass-transformFeedback-arrays
<alyssa> what this time?
<alyssa> oof
<jannau> KHR-GLES31.core.draw_indirect.advanced-twoPass-transformFeedback-elements
<jannau> for various configs
<jannau> for all configs
<alyssa> Interesting
<alyssa> definitely passes on M1
<jannau> error is in all cases: "(x,y)= (0,0). Color RGBA(0,0,0,1) is different than expected RGBA(0.1,0.2,0.3,1)"
<alyssa> jannau: The potentially "spicy" part of those tests is that they feed transform feedback results into the inidrect draw
<alyssa> since we dispatch xfb with the VDM (i.e. as vertex shaders with no fragment output), that's a forward VDM->VDM dependency, that does not require a full flush of the batch, but it does require a memory barrier
<alyssa> I'm wondering if this is morally the same issue as the atomics
<alyssa> the barrier we're using is strong enough to flush a cluster but not the whole system
<alyssa> See line 2892 of agx_state.c
<alyssa> try setting more bits (this will require adding extra fields in asahi/lib/cmdbuf.xml)
<alyssa> If someone has the ability to run wrap.dylib + agxdecode against t600x this corresponds to a metal memory barrier, that's where I got those magic bits in the first place
<alyssa> but in this case since we know what we're looking for bruteforcing might be faster anyway lol
<alyssa> jannau: any luck?
<jannau> alyssa: no. I think we're looking at different agx_state.c files. is line 2892 'cfg.unknown_30 = frag_tex_count >= 4;'?
<alyssa> uh, no
<alyssa> am i wrong the wrong branch
<alyssa> ok i was definitely way off
<alyssa> hopefully that makes more sense X_X
<jannau> yes
<alyssa> so sorry about that X_X
<jannau> adding more bits at the end or in the gaps? I suppose the answer is yes
<alyssa> yes
<ella-0> alyssa: tests i'm using are VK.api.copy_and_blit.core.image_to_image.simple_tests.*, branch is https://gitlab.freedesktop.org/Ella-0/mesa/-/tree/wip/agxv/meta
<alyssa> ella-0: thx
<jannau> alyssa: becomes a flake with bit (4 and) 24 set
<alyssa> uhoh
<alyssa> that's still setting all the other bits too?
<jannau> yes, those are in addition
<alyssa> interesting
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<alyssa> may be necessary to see what metal does after all :|
<alyssa> [encoder memoryBarrier: MTLBarrierScopeBuffers afterStages: MTLRenderStageVertex beforeStages: MTLRenderStageVertex]
<alyssa> or maybe need even more bits set. IDK
<jannau> all good with bits 4, 21-26 in addition
<alyssa> \o/
<alyssa> you going to write the patch then?
<jannau> if bit 27 would not break it I'd say bit 20 to 27 are for each cluster
<jannau> let me first test if I need all bits
<alyssa> I could easily believe that
<jannau> minimal set seems to be 4, 24, 26
<alyssa> are we sure it doesn't flake like that, though?
<jannau> reasonably sure. no fail in 1000 repeats and if omit any of the bits it fails in 50% +/- 10
<alyssa> woo!
* alyssa eagerly awaits the patch.. and the qpas ;)
<jannau> let me test if that breaks something on m1/m2
<alyssa> tangentially related, I don't think G13J exists
<alyssa> If I'm not mistaken m1 ultra is G13D
<alyssa> I may be mistaken of course
<jannau> you're correct. I think I mixed it up with the SoC family codename
<alyssa> nod
<alyssa> apple refers to the collection as G13X which isn't really right either :-D
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<jannau> "56/56 sessions passed, conformance test PASSED"
<alyssa> WHOO!
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<jannau> and the next target where fractional scaling breaks the x11_egl CTS. let's hope my fix gets merged soon so we can run under native wayland
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<alyssa> :-D
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