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<
paulk>
mhh it looks like I'm missing interrupts on H3, using the PIO interrupt on PA8
<
paulk>
the peripheral generating them sets a low level for 1 us
<
paulk>
so I configured a falling-edge interrupt, which works well when I ground the pin manually
<
paulk>
but not when the peripheral does it
<
paulk>
is it reasonable to think 1 us is too short for H3 to notice?
<
paulk>
(also I checked that the interrupt is actually being generated with a logic analyzer)
<
mripard>
paulk: the GPIO controller has debouncing
<
mripard>
and the sampling rate for debouncing is fairly low iirc, like based on the 32khz or something
<
paulk>
mripard: thanks! I can see there is sunxi_pinctrl_setup_debounce but apparently it needs a dt property that's not present
<
paulk>
so I would assume this is not enabled
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<
paulk>
unless you mean some purely hardware mechanism that is always-on?
<
mripard>
it needs a DT property to switch it to another clock iirc
<
mripard>
but yeah, it's always there
<
mripard>
(take it with a grain of salt, it's been a while)
<
mripard>
but I'm pretty certain it's enabled and sucks by default
<
paulk>
indeed it seems to be hooked to the 32 khz clock by default and can be set to the 24 mhz one
<
paulk>
well I'll try that, 24 mhz should work for 1 us
<
paulk>
mripard: that was the issue
<
paulk>
now the problem is that the dt property takes us, which is 24 times higher than the minimum that the hardware can manage
<
paulk>
so I had to hardcode div = 0 :(
<
paulk>
so I guess it won't be possible to hook this device to a non-patched kernel
<
paulk>
anyway thanks for the hint :)
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<
paulk>
come to think of it, it would make sense to have the smallest debouncing time as default
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