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<wens> cool, someone sent patches for the SSD2825 bridge
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<loki666> So on the Zero28 we got the CPU regulator working, turn out the tcs4838 is compatible with the silergy,syr827
<loki666> So for dvfs, how do I determine the speedbin of a133p ?
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<apritzel> loki666: you would need to pick them from some BSP. It's either in the DT, or you peek into sysfs on a running system
<apritzel> wens: where is that used? On old^Wancient tablets?
<loki666> BSP doesn't makes sense to me... Each opp entry contains a bunch of opp-microvolt-a0/a1/a2/...
<loki666> Not clear to what it maps to
<loki666> And it's not clear which one is actually being used for this board
<Jookia> loki666: they probably map to speedbins
<Jookia> at the factory they write to the chip which speed the chip is binned for
<Jookia> these end up in the efuse
<Jookia> Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml gives an example
<loki666> ok so they have one microvolts setting by speedbin, where in mainline we group microvolts with the speedbin bits. Right ?
<Jookia> i'm not sure
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<loki666> Yeah... I think I'll need a new speedbin index based on a133p speedbin efuse value
<Jookia> the BSP should/might have that
<loki666> Ok thanks
<apritzel> loki666: you can just look at what's in the mainline post: https://lore.kernel.org/linux-sunxi/20241031070232.1793078-12-masterr3c0rd@epochal.quest/T/#u
<apritzel> that has all the bits, you could just match what you see in the BSP against this one, the delta should be the A133P bin(s)
<loki666> apritzel: thanks, is this series already merged ?
<apritzel> loki666: I don't see that in mainline, but it has enough tags, and it seems like wens was suggesting they would go via a different tree (Viresh's pm tree, I guess)
<apritzel> loki666: but you must have those patches in your tree, don't you? Because they add the basic cpufreq support, which your A133p just builds on?
<loki666> Well, I only started looking at that... So far we have 6.13 running on a single CPU without dvfs.
<loki666> I understand SMP need TFA works, but with the CPU regulator already in, dvfs shouldn't be far
<apritzel> yes, with thermal, the regulator, and the CPU clock you have all you need, but you would need the bin detection code and the DVFS boilerplate, as shown in MasterR3C0RD's series
<apritzel> I strongly suggest you move to v6.14-rc2, and include his series on top. Some of that has been merged, but other parts have not (like those DVFS bits)
<loki666> Ok I'll do that... For SMP what's the hold up?
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<apritzel> altough the H6 and A133 look close in terms of the CPU core control, there must be some subtle difference in their, I just need to have a closer look
<apritzel> Hey, I posted a v2 of the A523/T527 Linux clock support series. I split the huge clock patch up, into 9 smaller ones, to help review
<apritzel> so please if ANYONE could grab a user manual and pick one of those patches and compare that?
<apritzel> You don't need to understand the whole thing, it's mostly just comparing register offset and bit positions between the tables in the manual and the C struct definitions in the driver
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<wens> apritzel: old a31s/a20 tablets from MSI
<wens> so, like 10 years too late?
<apritzel> wens: did they work with simplefb? I see mainline U-Boot drivers for the bridge ...
<wens> yup
<wens> just no kernel driver
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