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<macromorgan> yes, all of them do
<macromorgan> the only ones I've worked on thus far are the H700 based devices (Anbernic models RG35XX-Plus, RG35XX-2024, RG35XX-H, RG35XX-SP, and RG28XX) and the V3S based device (Anbernic RG Nano)
<macromorgan> which is to say all of their Allwinner lineup
<tokyovigilante> very annoying googling for info about the display engine now and only finding my patches... #FWDPs
<macromorgan> yeah, I hate it when that happens
<tokyovigilante> thanks apritzel for the review of the cpufreq patch too
<tokyovigilante> Good to see a clang build works though
<tokyovigilante> [ 0.000000] Linux version 6.10.0-rc2+ (ryan@crackotage) (clang version 17.0.0 (https://github.com/apple/llvm-project.git c7c87ee42989d4bea0df5eb1b7c16fcf358d6c35), GNU ld version 2.41-1.fc41) #56 SMP PREEMPT Wed Jun 19 14:08:50 NZST 2024
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<smaeul> 11:59 <apritzel> well, the AXP PMICs support some kind of suspend mode, but I don't know if that keeps the DRAM rails alive
<smaeul> entering AXP PMIC suspend mode just records the regulator enable state, and exiting restores the recorded state. you still have to disable regulators in software
<smaeul> 11:50 <apritzel> the secondaries could be completely off, but you would need something to run the wakeup code, right?
<smaeul> the CPU complex can be put in reset if there's a hardware state machine to bring it back up when receiving an IRQ, which there is: https://linux-sunxi.org/CPUIDLE
<smaeul> but without an ARISC you can't do anything _else_ after WFI like disabling VDD_CPUX
<smaeul> 12:04 <apritzel> I think it can even run on a 32KHz oscillator, so you can turn the 24 MHz osc off
<smaeul> yep, you can isolate the ARISC so you can power off VCC_DRAM/VCC_PLL/VDD_SYS as well (everything but VCC_PL/VCC_RTC/VDD_CPUS) and still be running code with access to the outside world through the R_ peripherals
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<smaeul> btw there are things you can do to save power without losing access to DRAM, like bypassing and powering off all of the other PLLs
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<apritzel> smaeul: thanks for the input!
<apritzel> smaeul: regarding PMIC suspend mode: from what I gather from the AXP717 manual, waking up from suspend only work via either an I2C register write (by software), or via the IRQ line
<apritzel> I guess the latter also comes from the SoC?
<apritzel> but apparently you cannot wake up the PMIC via the Power Key?
<apritzel> and I agree in general: we need some code to turn off devices, go to WFI, wakeup and return
<apritzel> what "turn off devices" really means, it's an implementation detail, so to speak, so we can start easy (like turning off as many PLLs as possible)
<apritzel> and then enhance this later, with stuff like turning PMIC rails off, using DRAM self refresh, and so on
<apritzel> smaeul: I was wondering if crust would be helpful here? Can we compile it for aarch64, and put (some of) it into SRAM A1?