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<loki666> apritzel I'll test your hotfix later
<apritzel> loki666: thanks! Please use pure mainline, plus this patch. I sincerely hope it works, as Lee needed some pushing to actually take it for v6.10 still
<loki666> I'll test again 6.10rc3
<loki666> ^agai'st
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<thecheofusi> Suppose I have a non contiguous buffer in memory whose size is 1,536,000 bytes, and the sunxi iommu
<thecheofusi> I call dma_map_sgtable on this buffer, and the iommu maps the whole thing into 1 contiguous dma address space
<thecheofusi> Then I unmap with dma_unmap_sgtable(), and after some time call dma_map_sgtable() again
<thecheofusi> Is there any reason why the second call to dma_map_sgtable() always returns a region in dma address space that is non contiguous?
<thecheofusi> I can guarantee that no other device is using the iommu
<jakllsch> depends
<thecheofusi> jakllsch: Could you be more specific?
<jakllsch> could the iommu space have gotten fragmented in the interim?
<loki666> apritzel: patch is working, you want me to reply on ML? looks like Lee didn't wait for it
<apritzel> loki666: many thanks for testing! Indeed seem like he just went ahead (good!), but you can reply for the records anyway, if you like
<loki666> ok
<thecheofusi> jakllsch: don't all mappings get cleaned up after dma_unmap_sgtable ?
<loki666> apritzel: what's the use of the rest of the series, it seems to be related to running on battery, but I tested on battery, and it works
<apritzel> it's an attempt to model the built-in boost regulator, which brings the battery voltage up to 5.0V for the USB bus
<apritzel> not sure how your DT looks like, but the mainline DT doesn't reference that (fortunately, otherwise it would be broken again)
<apritzel> macromorgan was messing around with that, but something was funny there, IIRC
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<thecheofusi> jakllsch: I figured out what the problem was
<thecheofusi> turns out I forgot to set the DMA max segment size
<thecheofusi> So the DMA-mapping code was splitting the mapping into chunks of a random (?) size that hovered around 60K
<apritzel> thecheofusi: what SoC is this on? Curious if your board has 4GB of DRAM...
<thecheofusi> t113-s3
<apritzel> ah, surely not 4GB then ;-)
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<thecheofusi> why do you ask?
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<apritzel> because the IOMMU in the H616 (and later) is still limited to 4GB of address space, both for input and output addresses, so cannot cover the last GB of DRAM on devices with 4GB
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