ChanServ changed the topic of #linux-sunxi to: Allwinner/sunxi development - Did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait for an answer! - This channel is logged at https://oftc.irclog.whitequark.org/linux-sunxi
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<apritzel> jernej: did some bare metal experiments with FEL: I can switch to AArch64, then back AArch32, but then returning to the stored LR fails
<apritzel> though I was just storing LR and PC, maybe there is more to save?
<apritzel> will try to verify this on the H616 tomorrow ...
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<wens> fraolt: the wiki should be updated. we use the new mailing list for upstream kernel (and maybe u-boot?) development
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<jernej> I'm looking for someone with T527 (or compatible) board which has DRAM TPR10 parameter with bit 20, 22 or 23 set. Those features were not tested yet in new DRAM driver.
<jernej> apritzel, junari: ^
<jernej> write training (bit 23) is not yet implemented
<apritzel> jernej: the X96QPro+ BSP has TPR10 as 0x802f7788, so all those bits clear :-(
<junari> I have only x96qpro+ too
<apritzel> the Teclast tablet has 0x2faacf, so it's the same there
<junari> apritzel: are you sure about 0x802f7788? On my board it is 0x882f7788
<jernej> OrangePi 4a has supposedly same settings as Avaota A1
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<BroderTuck> Agree with junari.
<BroderTuck> https://gist.github.com/warpme/54a713a53919e9ffa04c114fbb398a06 lists dram_para27 = <0x882f7788>;
<BroderTuck> and od -x /proc/device-tree/dram/dram_para27 under android on my x96xpro+ agrees with this value
<BroderTuck> ( dram_para10 in warpme's android dts lists 0x20, which is what od -x also gives on my box)
<jernej> oh, fun, above DT has detailed DX delays stored after TPR14, which can be obtained with eye scan. This would explain why first boot of BSP U-Boot was slow and following were quick.
<BroderTuck> Educate me, what does 'eye scan' mean here
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<jernej> tbh, I'm not sure, but AW calls procedure for tunning dx bit delays "dq eye scan" in libdram
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<jernej> probably something to do with eye diagram
<BroderTuck> Right. did you want me to test something? (having an spl binary that returns to fel would be nice)
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<jernej> no, as discussed before, all boards, including this one seems to use only read calibration for dram init, but not other methods
<jernej> btw, there are some issues with return to fel and apritzel is investigating what changed
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<BroderTuck> Ah well. The box works fine anyway with apritzel's boot binaries plus my own kernel (pure 6.16.5 plus just the a523-series patches nicked from warpme's repo, no other unrelated stuff)
<BroderTuck> 3 tiny things tho: 1. eMMC gets an error at init time (my box is the 32GB version if that makes any difference). 2. Reading the rtc times out. 3. trying 'shutdown -hP now' gave a stack backtrace
<BroderTuck> s/6.16/6.12/ ofc
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<apritzel> BroderTuck: yeah, eMMC is a bit of a mystery, not sure if it's something in our T527 code (something incompatible), or just something missing in the board DT
<apritzel> shutdown gets forwarded to PSCI in TF-A, since we use the vendor blob, I blame that
<apritzel> haven't checked the RTC
<apritzel> but keep in mind that this is all very early code, and the big hurdle is not really to get it "working somehow", but to get it *right* and upstream
<apritzel> jernej: does your Avaota have eMMC? Mine hasn't, it's not populated ...
<apritzel> jernej: oh also: not sure at all about the TPR10 DRAM parameter, it's just what I read from the boot0 header of an update image
<apritzel> and some images now carry multiple sets, and sometimes those values either get ignored or are overwritten
<BroderTuck> apritzel and from my end I just checked what the dts says, not what is actually used by boot0
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<triskit> anarsoul: to get messages from Matrix to IRC, you have to DM NickServ to authenticate yourself.
<triskit> On OFTC it’s IDENTIFY <password> <nick>
<triskit> s/<//, s/>//, s/<//
<apritzel> triskit: are those fishes or regexps? ;-)
<jakllsch> why not both?
<triskit> apritzel: Matrix swallowed the angle brackets and spit out sed syntax when I edited it :/
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