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<apritzel>
BroderTuck: ah, very nice! Can you put that information in the wiki?
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<BroderTuck>
apritzel: Sure, I can do that
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<BroderTuck>
And done. Hope my edit looks ok
<jernej>
apritzel: I like the clean ups that you made. However, I'm stuck at PLL code. Manuals aren't completely consistent and BSP code also isn't "by the book"
<apritzel>
jernej: well, this code was inspired by yours ;-)
<apritzel>
happy to change it, of course. I was thinking for instance that writing the parameters first, then the enable bit is probably pointless
<apritzel>
I cannot imagine the CCU doing anything with bits [15:8] unless it also sees some "action bits" set
<apritzel>
and the write is surely atomic, so we can merge the parameter setting and the enable bits into one write
<apritzel>
but that's all details that could be solved later, I think, unless they affect the DRAM setup?
<apritzel>
jernej: you mentioned changes the other day that should the double size detection, were they already in that commit I took from you?
<jernej>
sure, code looks fine as-is, maybe just add final update bit set at the end of the pll config procedure, as mandated by frequency switch algorithm? that's also implemented in BSP
<jernej>
apritzel: you mean fixing size misdetection, which appeared as double size?
<jernej>
oh, init_something() should be removed. That's done in TF-A
<jernej>
and size detection should be updated
<jernej>
in any case, there are few improvements to be made
<BroderTuck>
I love this conversation, sounds like I can soon finally replace my SyterKit-based bootsetup
<apritzel>
BroderTuck: for the X96QPro+ you could do already: it works fine for me, and I think junari reported the same
<apritzel>
BroderTuck: you'd get all 8 cores (as long as you don't offline them)
<apritzel>
jernej: yes, the size misdetection, I think I saw 8GB yesterday once
<apritzel>
jernej: and sure, they are improvements required, that's why I didn't post it yet, just pushed to my github ;-)
<apritzel>
since I think things like the FEL GICv3 bits haven't been out there before
<apritzel>
ah, and after fixing one thing the branch actually works on the Avaota as well, at least via SD card
* apritzel
gets lost in his boards, I meant the Radxa
<Jookia>
I started back in T113 land today. Yay
* apritzel
waves from the 8-core Cortex-A55 land :-D
<Jookia>
Wow, 64 bits...
<Jookia>
I still haven't actually touched a 64-bit ARM system outside the Librem 5 dev kit I have that I booted once then shelved
<Jookia>
Actually a 3d printer I'm trying to fix has a 64-bit ARM Linux board I think
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<apritzel>
Jookia: it's a bit shocking that you say "wow" to 64 bits in 2025 ;-)
<Jookia>
huh, really?
<Jookia>
does ARM pump out any low power 64-bit cores? maybe allwinner is just cheaping out
<Jookia>
the d1 is 64-bit
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<BroderTuck>
apritzel: ditto on 8-core land :) (tf-a and u-boot recompiled and booted with)
<BroderTuck>
survived 4 reboots without read errors, something the syterkit stuff wasn't really able to)
<apritzel>
BroderTuck: oh, well done! We have a user ;-)
<BroderTuck>
The only thing I changed was the value junari pointed to in u-boot, where I just changed the value without any ifs
<BroderTuck>
Didn't test without the change
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<BroderTuck>
and also, had to change a .mk file in tf-a since it wanted to use a triplet that was not available
<apritzel>
BroderTuck: how so? Didn't setting CROSS_COMPILE work, like in U-Boot or the kernel?