ChanServ changed the topic of #asahi-gpu to: Asahi Linux GPU development (no user support, NO binary reversing) | Keep things on topic | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-gpu
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<alyssa> 1. correct
<alyssa> 2. uhhhh not 100% sure off hand. I would expect alignment is needed
<alyssa> agx_nir_lower_sysvals aligns 64-bit to 64-bit boundaries so go with that
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<eric_engestrom> jannau: I think you can close https://github.com/KhronosGroup/VK-GL-CTS/pull/405, I think it might take a while for the khronos maintainer to get around to that
<_jannau__> done
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<i509vcb> I believe I've done lowering for base_vertex and num_workgroups correctly. But I need to have these values be set before the main shader executes somehow? I'd imagine I need to do something when recording the command to load the uniform registers with the expected values?
<i509vcb> (how do I go from the parameters passed into vkCmdDispatch to putting those in the uniform registers I have reserved for that sysval)
<i509vcb> for indirect, probably the same thing but I just tell where to load the values from?
<i509vcb> (well I mean what buffer to read from for indirect)
<alyssa> i509vcb: agx_usc_uniform
<alyssa> along with each shader, the driver specifies a list of GPU addresses to be preloaded into uniform register ranges
<alyssa> grep for agx_usc_uniform to see how that works
<alyssa> AHAHAHAH
<alyssa> alyssa you just need to add a load_texture_handle_agx intrinsic
<alyssa> then the special cases disappear
<alyssa> good ok i like this.
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<i509vcb> is there a way I can dump the state of uniform registers?
<alyssa> not really
<alyssa> could hack decode.c
<alyssa> ----------------
<alyssa> I just discovered that, due to a horrendously small sampler heap, it is impossible to implement standards conformant bindless samplers on M1
<alyssa> That means DX12 is impossible on this hardware
<alyssa> I am really peaved about this. What a stupid corner to cut.
<alyssa> Makes the "game porting toolkit" announcement even more obnoxious when I now *know* that samplers are necessarily broken in there.
<i509vcb> I guess I'll have to guess where I went wrong since the dEQP says I have the wrong values
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<i509vcb> something a bit simpler, dumping nir?
<alyssa> AGX_MESA_DEBUG=shaders
<alyssa> if you need to see NIR before/after every pass, NIR_DEBUG=print but it's very verbose
<alyssa> ASAHI_MESA_DEBUG=trace AGX_MESA_DEBUG=shaders is my go-to
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<i509vcb> The shader looks fine, I can see the load from the right uniform registers and the store into the buffer where the dEQP test compares the result
<i509vcb> I guess blame my code for uploading the uniforms?
<i509vcb> Found my problem, forgot to copy a struct...
<i509vcb> Well dEQP-VK.compute.builtin_var.num_work_groups passes
<i509vcb> alyssa: thank you for the help so far
<i509vcb> nope premature victory it passes some of the tests...
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<i509vcb> Ok now it passes
<alyssa> Woo!
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<i509vcb> Hmm I seem to have found a problem with the vk_meta_copy stuff
<i509vcb> it clobbers the currently bound pipeline
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<i509vcb> I guess all the stuff I built to make the sysval stuff expansible in the future is going to sit unsued for a bit...
<i509vcb> s/unsued/unused
<i509vcb> at least one is done
<alyssa> oh, yeah
<alyssa> we need to do meta save/restore
<alyssa> see how NVK does it
<alyssa> i509vcb: specifically, see nvk_meta_begin/nvk_meta_end
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<ella-0> i509vcb: yeah I have those save/restore stuff locally since it was causing some issues with occlusion query tests. will push tomorrow.
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<i509vcb> And I realize I did not consider indirect yet in my MR
<i509vcb> I'll do that later
<i509vcb> (now I see why the gallium driver doesn't lower every intrinsic the same way)
<i509vcb> s/intrinsic/sysval
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<alyssa> i509vcb: :)