ChanServ changed the topic of #asahi-dev to: Asahi Linux: porting Linux to Apple Silicon macs | Non-development talk: #asahi | General development | GitHub: https://alx.sh/g | Wiki: https://alx.sh/w | Logs: https://alx.sh/l/asahi-dev
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<nicolas17> I had a thought
<nicolas17> are Electron apps still causing problems due to page size dependencies?
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<nicolas17> ie. are there still Electron apps that support Linux-aarch64 but use old Chromium without the runtime-page-size stuff?
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<maz> mischa85: thanks for that. I'll have a look shortly.
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<mischa85> for the m1n1 devs: i'm trying to enable cpu0 like this: smp_start_cpu(0, 0, 0, 0, 0x210050000, 0x502800000 + cpu_offset) where i incremend cpu_offset by 0x1000 to find something that works. 0x210050000 (size: 0x9010) is the cpu-impl-reg of cpu0, and 0x502800000 is the start (end is 0x502818000) of dark-dcp/dapf-instance-0. all of this is of course without pmgr_init(). is this even possible like this
<mischa85> or am i chasing shadows?
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<mischa85> correction: 0x502800000 is the first /arm-io/pmgr/reg, it has a size of 0x1E0000
<mischa85> which would mean i have 0x1E = 30 options, considering the value of offset is always xxxxx1000
<sven> i don't think there's anything in pmgr that has to be turned on to bring the other cores up
<mischa85> that's what i hoped for
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<mischa85> only bad news is my math
<mischa85> it's 1E0 options, 300
<mischa85> not great, not terrible
<mischa85> but i gotta disable the bootcounter because it's going to be SError gallore and it boots into 1TR after a couple of "failed boots"
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<sven> any objections to just removing the entire backend stuff from SMC and making it M1/M2/etc. only for now? it's been >2 years and no one bothered to write a T2 or x86 mac backend so we might as well rip all the indirection and abstractions out for now and revisit that later once someone actually wants to write a backend for e.g. T2 macs
<chadmed> sven: fine by me. i was going to look at the x86 one when i did the hwmon driver so i could get rid of the old smc driver, but my x86 mac cooked itself sooooo
<sven> ouch
<chaos_princess> sven: might want to poke aditya from t2 crew, but no issues here
<sven> honestly? they had >2 years and nothing happened
<sven> and we can always add the backend abstraction back in later
<chaos_princess> sure then
<chadmed> did marcan ever advertise to anyone that we had written the driver in such a way? i remember a couple of conversations here but not much else
<chadmed> no skin in the game though, do whatever makes it easier to upstream
<sven> the t2 people are aware of it but "haven't figured it out yet"
<chadmed> yeah right okay lol go for it
<chaos_princess> i still have a pre-t2 mbp, but can't find a reason to boot it like, ever
<sven> afaict most sub-devices need (small) changes to work on pre-M1 anyway
<chadmed> i had mine lying around for sentimental reasons (piece of crap dual core i5 mbp got me through uni) but it became a spicy pillow and the keyboard gummed up
<sven> so might as well punt on all that until later
<sven> yeah, my 2011 mba's battery looked like a spicy pillow as well and iirc it didn't want to boot without a battery
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<maz> honestly, the fact that SMC isn't upstream is a massive drag. whatever helps moving this upstream gets my (relatively insignificant) vote.
<chadmed> it also means i can submit the hwmon driver for RFC
<chadmed> im really iffy on how we build the hwmon structs from the device tree
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<sven> maz: yeah, that's my thinking as well
<sven> just get the simplest possible driver upstream for now and then we can revisit that "what happens if we need a different way to access SMC" problem later if anyone actually care
<sven> *cares
<maz> exactly. the driver can always be extended with a new compatible string, should the need arise. it's not like SMC is open for people to plug random stuff into it anyway.
<chadmed> well it wouldnt be a dt compatible for our backend, it would be a backend for the x86 macs which use acpi
<maz> same difference. easy enough to plug in as an afterthought.
<chadmed> yeah
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<maz> sven: btw, SMC is an implicit requirement for the PCIe patches. the PCIe driver works without, of course, but nothing is functional without SMC.
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<maz> I need at least SMC and DART support in order to test things on my M2-pro.
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<sven> yet another reason to get this upstream
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<jannau> maz: ethernet should work without smc
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<jannau> we could also turn wifi/bluetooth on in m1n1. it has smc gpio because it's needed for display
<jannau> sven: no objection from stripping the backend modularity out. I plan to do the same for spi-hid
<chaos_princess> What do you mean by that, don't we need it for mtp? Or am i thinking about the wrong thing?
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<jannau> chaos_princess: I can't follow. spi-hid and mtp are fully independent HID transport drivers
<chaos_princess> ok i see now
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<sven> okay, this is looking much more manageable without the backend_ops indirection
<sven> also much less awkward if all the probing and resource allocation, etc. happens directly inside mfd
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<mischa85> okay i've exousted all the possibilities, cannot start the cpu. i have a list of addresses that result SError or Failed. only thing i could figure out is that offset 0x20000 fails, but the next call makes the system crash, fans go on (maybe safety mode?)
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<mischa85> or maybe i should be using my brain for a moment. the t6041 devicetree is full of mysteries but there are some new pairs in pmgr: misc-acg-offset = 0x98000, misc-cores-offset = 0x88000, cluster-ctl-offset = 0x20000
<mischa85> so my guess is that offset 0x20000 needs to be tickled in some way en then the cores are to be enabled from 0x88000 offset, same as m3
<fl0_id> mischa85 yeah just wanted to say 0x88000 is same as m3. does m3 do any tickling?
<mischa85> nope it just goes straight into firing the cores
<mischa85> maybe this will be a hint to how pmgr is done on m4
<mischa85> the good news i mapped the whole register range by bruteforcing
<fl0_id> m4 chip designer be like "i have this fancy new way to do this, finally have time to do it for m4"
<mischa85> so instead of feeding offset 0x20000 to smp_start_cpu i think i should be doing something else to that register
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<mischa85> i'm so glad i have a working shell for all this stuff
<mischa85> thanks jannau
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<mischa85> upon closer inspection, those are also present in t6031 adt. misc-acg-offset = 0x98000, misc-cores-offset = 0x88000 are the same on m4/m3 but cluster-ctl-offset is 0x18000 on t6031 and 0x20000 on t6041
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